Conventional CMOS technology operated at cryogenic conditions has recently attracted interest for its uses in low-noise electronics. We present one of the first characterizations of 180 nm CMOS technology at a temperature of 100 mK, extracting I/V characteristics, threshold voltages, and transconductance values, as well as observing their temperature dependence. We find that CMOS devices remain fully operational down to these temperatures, although we observe hysteresis effects in some devices. The measurements described in this paper can be used to inform the future design of CMOS devices intended to be operated in this deep cryogenic regime.
The Skipper CCD-in-CMOS Parallel Read-Out Circuit (SPROCKET) is a mixed-signal front-end design for the readout of Skipper CCD-in-CMOS image sensors. SPROCKET is fabricated in a 65 nm CMOS process and each pixel occupies a 50$μ$m $\times$ 50$μ$m footprint. SPROCKET is intended to be heterogeneously integrated with a Skipper-in-CMOS sensor array, such that one readout pixel is connected to a multiplexed array of nine Skipper-in-CMOS pixels to enable massively parallel readout. The front-end includes a variable gain preamplifier, a correlated double sampling circuit, and a 10-bit serial successi…
The prevalent use of large volume liquid argon detectors strongly motivates the development of novel readout and monitoring technology which functions at cryogenic temperatures. This paper presents the development of a cryogenic CMOS camera system suitable for use inside a large volume liquid argon detector for online monitoring purposes. The characterisation of the system is described in detail. The reliability of such a camera system has been demonstrated over several months, and recent data from operation within the liquid argon region of the DUNE 35tcryostat is presented. The cameras were …
The recent R&D focus on CMOS sensors with charge collection in a depleted zone has opened new perspectives for CMOS sensors as fast and radiation hard pixel devices. These sensors, labelled as depleted CMOS sensors (DMAPS), have already shown promising performance as feasible candidates for the ATLAS Inner Tracker (ITk) upgrade, possibly replacing the current passive sensors. A further step to exploit the potential of DMAPS is to investigate the suitability of equipping the outer layers of the ATLAS ITk upgrade with fully monolithic CMOS sensors. This paper presents the development of a deplet…
In this paper, we apply the sorting network theory to construct an analog rank order filter. We present a voltage mode CMOS two-input sorting element and arrange these to form a rank order filter. The resulting circuit is simpleand is a high-speed, high-precision design. Although the transistor count is moderately higher than other designs, the proposed circuit simultaneously outputs signals of all ranks rather than of just one specified rank. We also develop a slightly modified design which calculates the rank of a given signal. We present reports of simulations to verify the performance of t…
The radiation response of a 0.25 um silicon-on-sapphire CMOS technology is characterized at the transistor and circuit levels utilizing both standard and enclosed layout devices. Device-level characterization showed threshold voltage change of less than 170 mV and leakage current change of less than 1 nA for individual nMOSFET and pMOSFET devices at a total dose of 100 krad(SiO2). The increase in power supply current at the circuit level was less than 5%, consistent with the small change in off-state transistor leakage current. The technology exhibits good characteristics for use in the electr…
The control interface of a large-scale quantum computer will likely require electronic sub-systems that operate in close proximity to the qubits, at deep cryogenic temperatures. Here, we report the low-temperature performance of custom cryo-CMOS band-gap reference circuits designed to provide stable voltages and currents on-chip, independent of local temperature fluctuations. Our circuits are fabricated in 0.35 um silicon Germanium (SiGe) BiCMOS and 28 nm Fully Depleted Silicon On Insulator (FDSOI) CMOS processes, and we compare the performance of each. Beyond their specific application as low…
In this paper we present a novel, quadruple well process developed in a modern 0.18mu CMOS technology called INMAPS. On top of the standard process, we have added a deep P implant that can be used to form a deep P-well and provide screening of N-wells from the P-doped epitaxial layer. This prevents the collection of radiation-induced charge by unrelated N-wells, typically ones where PMOS transistors are integrated. The design of a sensor specifically tailored to a particle physics experiment is presented, where each 50mu pixel has over 150 PMOS and NMOS transistors. The sensor has been fabrica…
This paper reviews the development of CMOS Monolithic Active Pixel Sensors (MAPS) for future vertex detectors. MAPS are developed in a standard CMOS technology. In the imaging field, where the technology found its first applications, they are also known as CMOS Image Sensors. The use of MAPS as a detector for particle physics was first proposed at the end of 1999. Since then, their good performance in terms of spatial resolution, efficiency, radiation hardness have been demonstrated and work is now well under way to deliver the first MAPS-based vertex detectors.
Depleted monolithic CMOS active pixel sensors (DMAPS) have been developed in order to demonstrate their suitability as pixel detectors in the outer layers of a toroidal LHC apparatus inner tracker (ATLAS ITk) pixel detector in the high-luminosity large hadron collider (HL-LHC). Two prototypes have been fabricated using 150 nm CMOS technology on high resistivity (> 2 k$Ω$ $cm^2$) wafers. The chip size is equivalent to that of the current ATLAS pixel detector readout chip. One of the prototypes is used for detailed characterization of the sensor and the analog readout of the DMAPS. The other is …
Pixel sensors based on commercial high-voltage CMOS processes are an exciting technology that is considered as an option for the outer layer of the ATLAS inner tracker upgrade at the High Luminosity LHC. Here, charged particles are detected using deep n-wells as sensor diodes with the depleted region extending into the silicon bulk. Both analog and digital readout electronics can be added to achieve different levels of integration up to a fully monolithic sensor. Small scale prototypes using the ams CMOS technology have previously demonstrated that it can achieve the required radiation toleran…
This work presents a depleted monolithic active pixel sensor (DMAPS) prototype manufactured in the LFoundry 150\,nm CMOS process. DMAPS exploit high voltage and/or high resistivity inclusion of modern CMOS technologies to achieve substantial depletion in the sensing volume. The described device, named LF-Monopix, was designed as a proof of concept of a fully monolithic sensor capable of operating in the environment of outer layers of the ATLAS Inner Tracker upgrade in 2025 for the High Luminosity Large Hadron Collider (HL-LHC). This type of devices has a lower production cost and lower materia…
In this paper a CMOS two stage operational amplifier has been presented which operates at 1.8 V power supply at 0.18 micron (i.e., 180 nm) technology and whose input is depended on Bias Current. The op-amp provides a gain of 63dB and a bandwidth of 140 kHz for a load of 1 pF. This op-amp has a Common Mode gain of -25 dB, an output slew rate of 32 $V / μs$, and a output voltage swing. The power consumption for the op-amp is $300μW$.
We present the design and performance of a prototype ASIC digitizer for integrated wire chamber readout, implemented in 65 nm commercial CMOS technology. Each channel of the 4-channel prototype is composed of two 16-bit Time-to-Digital Converters (TDCs), one 8-bit Analog-to-Digital Converter (ADC), a front-end preamplifier and shaper, plus digital and analog buffers that support a variety of digitization chains. The prototype has a multiplexed digital backend that executes a state machine, distributes control and timing signals, and buffers data for serial output. Laboratory bench tests measur…
Monolithic Active Pixel Sensors (MAPS) have been developed since the late 1990s employing silicon substrate with a thin epitaxial layer in which deposited charge is collected by disordered diffusion rather than by drift in an electric field. As a consequence the signal is small and slow, and the radiation tolerance is below the requirements for LHC experiments by factors of 100 to 1000. We developed fully depleted (D)MAPS pixel sensors employing a 150 nm CMOS technology and using a high resistivity substrate as well as a high biasing voltage. The development has been carried out in three subse…
A number of critical active and passive components of optical links have been tested at 77 K or lower temperatures, demonstrating potential development of optical links operating inside the liquid argon time projection chamber (LArTPC) detector cryostat. A ring oscillator, individual MOSFETs, and a high speed 16:1 serializer fabricated in a commercial 0.25-um silicon-on-sapphire CMOS technology continued to function from room temperature to 4.2 K, 15 K, and 77 K respectively. Three types of laser diodes lase from room temperature to 77 K. Optical fibers and optical connectors exhibited minute …
The semiconductor industry's rapid advancement pushes conventional two-dimensional technology to its utmost limitations in terms of scaling, performance, and cost factors. These challenges drive the usage of 3D technology in the production of various Integrated Circuits. One of the numerous features of 3D Integration is the use of Through Silicon Vias (TSVs) for the assembly of multilayers into a single stack. This process, which was initially developed for memory chips, has been used afterward in many applications in other areas of microelectronics. The purpose of this research is to assess t…
The cryogenic sapphire oscillator (CSO) is a highly specialized machine, which delivers a reference signal exhibiting the lowest frequency fluctuations. For the best units, the Allan deviation (ADEV) is <1e-15 for integration time between 1 and 10,000 s, with a drift <1e-14 in one day.The oscillator is based on a sapphire monocrystal resonating at 10 GHz in a whispering-gallery mode, cooled at 6 K for highest Q-factor and zero thermal coefficient. We report on the progress accomplished implementing eleven CSOs in about 10 years since the first sample delivered to the ESA station in Argentina. …
The LHC Phase-II upgrade will lead to a significant increase in luminosity, which in turn will bring new challenges for the operation of inner tracking detectors. A possible solution is to use active silicon sensors, taking advantage of commercial CMOS technologies. Currently ATLAS R&D programme is qualifying a few commercial technologies in terms of suitability for this task. In this paper a prototype designed in one of them (LFoundry 150 nm process) will be discussed. The chip architecture will be described, including different pixel types incorporated into the design, followed by simulation…
This work presents a depleted monolithic active pixel sensor (DMAPS) prototype manufactured in the LFoundry 150 nm CMOS process. The described device, named LF-Monopix, was designed as a proof of concept of a fully monolithic sensor capable of operating in the environment of outer layers of the ATLAS Inner Tracker upgrade for the High Luminosity Large Hadron Collider (HL-LHC). Implementing such a device in the detector module will result in a lower production cost and lower material budget compared to the presently used hybrid designs. In this paper the chip architecture will be described foll…
The planned luminosity increase at the Large Hadron Collider in the coming years has triggered interest in the use of the particles' time of arrival as additional information in specialized detectors to mitigate the impact of pile-up. The required time resolution is of the order of tens of picoseconds, with a spatial granularity of the order of 1 mm. A time measurement at this precision level will also be of interest beyond the LHC and beyond high energy particle physics. We present in this paper the first developments towards a radiation hard Depleted Monolithic Active Pixel Sensor (DMAPS), w…
Deep sub micron HV-CMOS processes offer the opportunity for sensors built by industry standard techniques while being HV tolerant, making them good candidates for drift-based, fast collecting, thus radiation-hard pixel detectors. For the upgrade of the ATLAS Pixel Detector towards the HL-LHC requirements, active pixel sensors in HV-CMOS technology were investigated. These implement amplifier and discriminator stages directly in insulating deep n-wells, which also act as collecting electrodes. The deep n-wells allow for bias voltages up to 150V leading to a depletion depth of several 10um. Prot…
The CLIC Tracker Detector (CLICTD) is a monolithic pixel sensor featuring pixels of 30um x 37.5um and a small collection diode. The sensor is fabricated in a 180 nm CMOS imaging process, using two different pixel flavours: the first with a continuous n-type implant for full lateral depletion, and the second with a segmentation in the n-type implant for accelerated charge collection. Moreover, CLICTD features an innovative sub-pixel segmentation scheme that allows the digital footprint to be reduced while maintaining a small sub-pixel pitch. In this contribution, test-beam measurements for the …
A CMY colour camera differs from its RGB counterpart in that it employs a subtractive colour space of cyan, magenta and yellow. CMY cameras tend to performs better than RGB cameras in low light conditions due to their much higher transmittance. However, conventional CMY colour filter technology made of pigments and dyes are limited in performance for the next generation image sensors with submicron pixel sizes. These conventional filters are difficult to fabricate at nanoscale dimensions as they use their absorption properties to subtract colours. This paper presents a CMOS compatible nanoscal…
Pixel sensors using 8" CMOS processing technology have been designed and characterized offering the benefits of industrial sensor fabrication, including large wafers, high throughput and yield, as well as low cost. The pixel sensors are produced using a 150 nm CMOS technology offered by LFoundry in Avezzano. The technology provides multiple metal and polysilicon layers, as well as metal-insulator-metal capacitors that can be employed for AC-coupling and redistribution layers. Several prototypes were fabricated and are characterized with minimum ionizing particles before and after irradiation t…
The Quad transimpedance and limiting amplifier (QTIA) is a 4-channel array optical receiver ASIC, developed using a 65 nm CMOS process. It is configurable between the bit rate of 2.56 Gbps and 10 Gbps per channel. QTIA offers careful matching to both GaAs and InGaAs photodiodes. At this R&D stage, each channel has a different biasing scheme to the photodiode for optimal coupling. A charge pump is implemented in one channel to provide a higher reverse bias voltage, which is especially important to mitigate radiation effects on the photodiodes. The circuit functions of QTIA successfully passed t…
A scaled-up quantum computer will require a highly efficient control interface that autonomously manipulates and reads out large numbers of qubits, which for solid-state implementations are usually held at millikelvin (mK) temperatures. Advanced CMOS technology, tightly integrated with the quantum system, would be ideal for implementing such a control interface but is generally discounted on the basis of its power dissipation that leads to heating of the fragile qubits. Here, we demonstrate an ultra low power, CMOS-based quantum control platform that takes digital commands as input and generat…
Silicon p-n junction diodes emit low-intensity, broad-spectrum light near 1120 nm in forward bias and between 400-900 nm in reverse bias (avalanche). For the first time, we experimentally achieve optical absorption sensing of pigment in solution with silicon micro LEDs designed in a standard silicon-on-insulator CMOS technology. By driving a single LED in both forward and avalanche modes of operation, we steer its electroluminescent spectrum between visible and near-infrared (NIR). We then characterize the vertical optical transmission of both visible and NIR light from the LED through the sam…
CMOS sensors were successfully implemented in the STAR tracker [1]. LHC experiments have shown that efficient b tagging, reconstruction of displaced vertices and identification of disappearing tracks are necessary. An improved vertex detector is justified for the ILC. To achieve a point(spatial single layer) resolution below the one-μm range while improving other characteristics (radiation tolerance and eventually time resolution) we will need the use of 1-micron pitch pixels. Therefore, we propose a single MOS transistor that acts as an amplifying device and a detector with a buried charge-co…
We present a readout chip prototype for future pixel detectors with timing capabilities. The prototype is intended for characterizing 4D pixel arrays with a pixel size of $100\times100~μ\text{m}^2$, where the sensors are Low Gain Avalanche Diodes (LGADs). The long-term focus is towards a possible replacement of disks in the extended forward pixel system (TEPX) of the CMS experiment during the High Luminosity LHC (HL-LHC). The requirements for this ASIC are the incorporation of a Time to Digital Converter (TDC) within each pixel, low power consumption, and radiation tolerance up to $5\times10^{…
Characterization of Passive CMOS Strip Detectors After Proton Irradiation
TU Dortmund（多特蒙德工业大学）；Deutsches Elektronen Synchrotron DESY（德国电子同步加速器中心）；University of Bonn（波恩大学）；Albert-Ludwigs-Universität Freiburg（弗赖堡大学）；Fachhochschule Dortmund（多特蒙德应用技术大学）
Active pixel sensors based on the High-Voltage CMOS technology are being investigated as a viable option for the future pixel tracker of the ATLAS experiment at the High-Luminosity LHC. This paper reports on the testbeam measurements performed at the H8 beamline of the CERN Super Proton Synchrotron on a High-Voltage CMOS sensor prototype produced in 180 nm AMS technology. Results in terms of tracking efficiency and timing performance, for different threshold and bias conditions, are shown.
Monolithic active pixel sensors produced in High Voltage CMOS (HV-CMOS) technology are being considered for High Energy Physics applications due to the ease of production and the reduced costs. Such technology is especially appealing when large areas to be covered and material budget are concerned. This is the case of the outermost pixel layers of the future ATLAS tracking detector for the HL-LHC. For experiments at hadron colliders, radiation hardness is a key requirement which is not fulfilled by standard CMOS sensor designs that collect charge by diffusion. This issue has been addressed by …
An upgrade of the ATLAS experiment for the High Luminosity phase of LHC is planned for 2024 and foresees the replacement of the present Inner Detector (ID) with a new Inner Tracker (ITk) completely made of silicon devices. Depleted active pixel sensors built with the High Voltage CMOS (HV-CMOS) technology are investigated as an option to cover large areas in the outermost layers of the pixel detector and are especially interesting for the development of monolithic devices which will reduce the production costs and the material budget with respect to the present hybrid assemblies. For this purp…
Silicon detectors based on the HV-CMOS technology are being investigated as possible candidate for the outer layers of the ATLAS pixel detector for the High Luminosity LHC. In this framework the H35Demo ASIC has been produced in the 350 nm AMS technology (H35). The H35Demo chip has a large area ($18.49 \times 24.40 \, \mathrm{mm^2}$) and includes four different pixel matrices and three test structures. In this paper the radiation hardness properties, in particular the evolution of the depletion region with fluence is studied using edge-TCT on test structures. Measurements on the test structure…
Cold electronics is a key technology in many areas of science and technology including space exploration programs and particle physics. A major experiment with a very large number of analog and digital electronics signal processing channels to be operated at cryogenic temperatures is the next-generation neutrino experiment, the Deep Underground Neutrino Experiment (DUNE). The DUNE detector uses liquid Argon at 87K as a target material for neutrinos, and as a medium to track charged particles resulting from interactions in the detector volume. The DUNE electronics [1] consists of custom-designe…
The CLIC Tracker Detector (CLICTD) is a monolithic pixel sensor. It is fabricated in a 180 nm CMOS imaging process, modified with an additional deep low-dose n-type implant to obtain full lateral depletion. The sensor features a small collection diode, which is essential for achieving a low input capacitance. The CLICTD sensor was designed as a technology demonstrator in the context of the tracking detector studies for the Compact Linear Collider (CLIC). Its design characteristics are of broad interest beyond CLIC, for HL-LHC tracking detector upgrades. It is produced in two different pixel fl…
