This paper presents a physics-based analytical model for the MOS transistor operating continuously from room temperature down to liquid-helium temperature (4.2 K) from depletion to strong inversion and in the linear and saturation regimes. The model is developed relying on the 1D Poisson equation and the drift-diffusion transport mechanism. The validity of the Maxwell-Boltzmann approximation is demonstrated in the limit to zero Kelvin as a result of dopant freeze-out in cryogenic equilibrium. Explicit MOS transistor expressions are then derived including incomplete dopant-ionization, bandgap widening, mobility reduction, and interface charge traps. The temperature dependency of the interface-trapping process explains the discrepancy between the measured value of the subthreshold swing and the thermal limit at deep-cryogenic temperatures. The accuracy of the developed model is validated by experimental results on a commercially available 28-nm bulk CMOS process. The proposed model provides the core expressions for the development of physically-accurate compact models dedicated to low-temperature CMOS circuit simulation.
We show that a cryogenic amplifier composed of a homemade GaAs high-electron-mobility transistor (HEMT) is suitable for current-noise measurements in a mesoscopic device at dilution-refrigerator temperatures. The lower noise characteristics of our homemade HEMT leads to a lower noise floor in the experimental setup and enables more efficient current-noise measurement than is available with a commercial HEMT. We present the dc transport properties of the HEMT and the gain and noise characteristics of the amplifier. With the amplifier employed for current-noise measurements in a quantum point co…
Josephson junction field effect transistors (JJ-FET) share design similarities with metal-oxide-semiconductor field effect transistors, except for the source/drain contacts being replaced by superconductors. Similarly, the super current due to proximity effect is tunable by the gate voltage. In this study, we examine the feasibility of JJ-FET-based Boolean logic and memory elements for cryogenic computing, in light of recent advances in novel materials and fabrication techniques. Using a two-dimensional ballistic transport JJ-FET model, we implement circuit level simulations for JJ-FET logic g…
The InGaAs-InAlAs-InP high electron mobility transistor (InP HEMT) is the preferred active device used in a cryogenic low noise amplifier (LNA) for sensitive detection of microwave signals. We observed that an InP HEMT 0.3-14GHz LNA at 2K, where the in-going transistors were oriented perpendicular to a magnetic field, heavily degraded in gain and average noise temperature already up to 1.5T. Dc measurements for InP HEMTs at 2K revealed a strong reduction in the transistor output current as a function of static magnetic field up to 14T. In contrast, the current reduction was insignificant when …
Multi-Branch Transport in a Back-gated WS$_2$ Transistor at Deep-Cryogenic Temperature
University of Strathclyde（斯特拉斯克莱德大学）；Tyndall National Institute, University College Cork（科克大学廷德尔国家研究所）；School of Chemistry, University College Cork（科克大学化学学院）；National Physical Laboratory（英国国家物理实验室）
Cryogenic low noise amplifiers based on high electron mobility transistors (HEMTs) are widely used in applications such as radio astronomy, deep space communications, and quantum computing, and the physical mechanisms governing the microwave noise figure are therefore of practical interest. In particular, the contribution of thermal noise from the gate at cryogenic temperatures remains unclear owing to a lack of experimental measurements of thermal resistance under these conditions. Here, we report measurements of gate junction temperature and thermal resistance in a HEMT at cryogenic and room…
Statistical evaluation of 571 GaAs quantum point contact transistors showing the 0.7 anomaly in quantized conductance using millikelvin cryogenic on-chip multiplexing
We propose a thermal transistor based on a three-terminal normal-superconductor (NS) junction with superconductor terminal acting as the base. The emergence of heat amplification is due to the negative differential thermal conductance (NDTC) effect for the NS diode in which the normal side maintains a higher temperature. The temperature dependent superconducting energy gap is responsible for the NDTC. By controlling quantum dot levels and their coupling strengths to the terminals, a huge heat amplification factor can be achieved. The setup offers an alternative tuning scheme of heat amplificat…
Cryogenic characterization and modeling of 0.18um CMOS technology (1.8V and 5V) are presented in this paper. Several PMOS and NMOS transistors with different width to length ratios(W/L) were extensively characterized under various bias conditions at temperatures ranging from 300K down to 4.2K. We extracted their fundamental physical parameters and developed a compact model based on BSIM3V3. In addition to their I-V characteristics, threshold voltage(Vth) values, on/off current ratio, transconductance of the MOS transistors, and resistors on chips are measured at temperatures from 300K down to …
This letter reports a temperature-dependent limit for the subthreshold swing in MOSFETs that deviates from the Boltzmann limit at deep-cryogenic temperatures. Below a critical temperature, the derived limit saturates to a value that is independent of temperature and proportional to the extent of a band tail. Since the saturation is universally observed in different types of MOSFETs (regardless of dimension or semiconductor material), the band tail is attributed to the finite periodicity of the lattice in a semiconductor volume, and to a lesser extent to additional lattice perturbations such as…
High-fidelity single-shot readout of spin qubits requires distinguishing states much faster than the T1 time of the spin state. One approach to improving readout fidelity and bandwidth (BW) is cryogenic amplification, where the signal from the qubit is amplified before noise sources are introduced and room-temperature amplifiers can operate at lower gain and higher BW. We compare the performance of two cryogenic amplification circuits: a current-biased heterojunction bipolar transistor circuit (CB-HBT), and an AC-coupled HBT circuit (AC-HBT). Both circuits are mounted on the mixing-chamber sta…
We demonstrate a 36$\times$36 gate electrode crossbar that supports 648 narrow-channel field effect transistors (FET) for gate-defined quantum dots, with a quadratic increase in quantum dot count upon a linear increase in control lines. The crossbar is fabricated on an industrial $^{28}$Si-MOS stack and shows 100% FET yield at cryogenic temperature. We observe a decreasing threshold voltage for wider channel devices and obtain a normal distribution of pinch-off voltages for nominally identical tunnel barriers probed over 1296 gate crossings. Macroscopically across the crossbar, we measure an a…
A scaled-up quantum computer will require a highly efficient control interface that autonomously manipulates and reads out large numbers of qubits, which for solid-state implementations are usually held at millikelvin (mK) temperatures. Advanced CMOS technology, tightly integrated with the quantum system, would be ideal for implementing such a control interface but is generally discounted on the basis of its power dissipation that leads to heating of the fragile qubits. Here, we demonstrate an ultra low power, CMOS-based quantum control platform that takes digital commands as input and generat…
We report the multi-scale modeling and design of a gate-defined single-electron transistor in a MoS$_{2}$ bilayer. By combining density-functional theory and finite-element analysis, we design a surface gate structure to electrostatically define and tune a quantum dot and its associated tunnel barriers in the MoS$_{2}$ bilayer. Our approach suggests new pathways for the creation of novel quantum electronic devices in two-dimensional materials.
Valley degree of freedom in the 2D semiconductor is a promising platform for the next generation optoelectronics. Electrons in different valleys can have opposite Berry curvature, leading to the valley Hall effect (VHE). However, VHE without the plasmonic structure's assistance has only been reported in cryogenic temperature, limiting its practical application. Here, we report the observation of VHE at room temperature in the MoS2/WSe2 heterostructures. We also uncover that both the magnitude and the polarity of the VHE in the 2D heterostructure is gate tunable. We attribute this to the opposi…
Silicon-germanium heterojunction bipolar transistors (HBTs) are of interest as low-noise microwave amplifiers due to their competitive noise performance and low cost relative to III-V devices. The fundamental noise performance limits of HBTs are thus of interest, and several studies report that quasiballistic electron transport across the base is a mechanism leading to cryogenic non-ideal IV characteristics that affects these limits. However, this conclusion has not been rigorously tested against theoretical predictions because prior studies modeled electron transport with empirical approaches…
Improving carrier mobilities of two-dimensional (2D) semiconductors is highly sought after. Recently, Ng. et al. [1] reported rippled molybdenum disulfide (MoS$_2$) transistors on bulged silicon nitride (SiN$_x$) substrates that exhibit high electron mobilities up to ~900 cm$^2$V$^{-1}$s$^{-1}$. The high mobility values were attributed to the suppression of electron-phonon scattering by the lattice distortion in the rippled MoS$_2$ channel. While the results are compelling, this Matters Arising shows that the mobility values in ref. [1] are likely to be overestimated due to invasive voltage pr…
We investigate the origin of the hysteresis observed in the transfer characteristics of back-gated field-effect transistors with an exfoliated MoS2 channel. We find that the hysteresis is strongly enhanced by increasing either gate voltage, pressure, temperature or light intensity. Our measurements reveal a step-like behavior of the hysteresis around room temperature, which we explain as water-facilitated charge trapping at the MoS2/SiO2 interface. We conclude that intrinsic defects in MoS2, such as S vacancies, which result in effective positive charge trapping, play an important role, beside…
We present a cryogenic microwave noise source with a characteristic impedance of 50 $Ω$, which can be installed in a coaxial line of a cryostat. The bath temperature of the noise source is continuously variable between 0.1 K and 5 K without causing significant back-action heating on the sample space. As a proof-of-concept experiment, we perform Y-factor measurements of an amplifier cascade that includes a traveling wave parametric amplifier and a commercial high electron mobility transistor amplifier. We observe system noise temperatures as low as $680^{+20}_{-200}$ mK at 5.7 GHz corresponding…
Field-Effect Transistors Based on Few-Layered alpha-MoTe_2
本文报道了在SiO_2上用机械剥离法生长的几层化学气相传输法生长的α- MoTe_2晶体的场效应晶体管的特性。我们进行了场效应和霍尔迁移率测量，以及拉曼散射和透射电子显微镜。与MoS_2和MoSe_2相比，我们的MoTe_2场效应晶体管（FET）被观察到是空穴掺杂的，显示超过106的开/关比和典型的亚阈值摆幅为每十倍约140 mV。场效应迁移率和霍尔迁移率的最大值接近或超过10 cm ^2/Vs，这与以前报道的室温下单层或双层MoS_2和/或MoSe_2在SiO_2上剥离的数据相当。拉曼散射揭示了尖锐的模式与以前的报告，其频率被发现显示很少或没有依赖于层数。由于两种MoS_2都是电子掺杂的，MoTe_2在MoS_2上的堆叠可以产生双极场效应晶体管和间隙调制。尽管MoTe_2的总体电子性能与MoS_2和MoSe_2相当，但较重的元素Te应该会导致更强的自旋轨道耦合，并可能伴随着更长的激子谷和自旋指数的退相干时间。
This work deals with the electron beam irradiation of the Schottky metal contacts in monolayer molybdenum disulfide (MoS$_2$) field-effect transistors (FETs). We show that the exposure of the Ti/Au source/drain leads to an electron beam improves the transistor conductance. We simulate the path of the electrons in the device and show that most of the beam energy is absorbed in the metal contacts. Hence, we propose that the transistor current enhancement is due to thermally induced interfacial reactions that lower the contact Schottky barriers. We also show that the electron beam conditioning of…
In this paper we propose two transistor concepts based on lateral heterostructures of monolayer MoS$_2$, composed of adjacent regions of 1T (metallic) and 2H (semiconducting) phases, inspired by recent research showing the possibility to obtain such heterostructures by electron beam irradiation. The first concept, the lateral heterostructure field-effect transistor, exhibits potential of better performance with respect to the foreseen evolution of CMOS technology, both for high performance and low power applications. Performance potential has been evaluated by means of detailed multi-scale mat…
Intrinsic carrier mobility of multi-layered MoS$_2$ field-effect transistors on SiO$_2$
通过制备和表征四端结构的多层MoS $_2$基场效应晶体管（FET），我们证明了由于接触处的肖特基势垒，两端结构倾向于低估载流子迁移率$μ$。对于背栅双端配置，我们观察到高达125 cm $^2$ V $^{-1}$ s $^{-1}$的迁移率，其显著小于当使用四端配置时从相同器件提取的306.5 cm $^2$ V $^{-1}$ s $^{-1}$。这表明在SiO $_2$上的MoS $_2$的本征迁移率明显大于先前报道的值，并提供了一种定量方法来评估通过接触的电荷传输。
We demonstrate non-volatile, n-type, back-gated, MoS$_{2}$ transistors, placed directly on an epitaxial grown, single crystalline, PbZr$_{0.2}$Ti$_{0.8}$O$_{3}$ (PZT) ferroelectric. The transistors show decent ON current (19 $μA/μ$m), high on-off ratio (10$^{7}$), and a subthreshold swing of (SS ~ 92 mV/dec) with a 100 nm thick PZT layer as the back gate oxide. Importantly, the ferroelectric polarization can directly control the channel charge, showing a clear anti-clockwise hysteresis. We have selfconsistently confirmed the switching of the ferroelectric and corresponding change in channel cu…
Non-volatile memory devices have been limited to flash architectures that are complex devices. Here, we present a unique photomemory effect in MoS$_2$ transistors. The photomemory is based on a photodoping effect - a controlled way of manipulating the density of free charges in monolayer MoS$_2$ using a combination of laser exposure and gate voltage application. The photodoping promotes changes on the conductance of MoS$_2$ leading to photomemory states with high memory on/off ratio. Such memory states are non-volatile with an expectation of retaining up to 50 % of the information for tens of …
