We present the second prototype of a time-to-digital (TDC) ASIC for the upgrade of the ATLAS Monitored Drift Tube (MDT) detector for High-Luminosity LHC operations. Compared to the first prototype, triple modular redundancy has been implemented for the configuration and flow control logic. The total power consumption is increased by less than 10 mW while achieving the same time resolution and channel uniformity. A mini-DAQ system has been built to verify the front-end electronics chain with the new prototype together with other ASICs and boards in triggered mode. Cosmic ray tests with a small-diameter MDT chamber indicate that the configuration and data transmission of the readout electronics perform well. It is expected that this prototype design will be used in the final production.
The upgrade of the ATLAS muon spectrometer for high-luminosity LHC requires new trigger and readout electronics for the various elements of the detector. We present the design of a time-to-digital converter (TDC) ASIC prototype for the ATLAS Monitored Drift Tube (MDT) detector. The chip was fabricated in a GlobalFoundries 130 nm CMOS technology. Studies indicate that its timing and power consumption characteristics meet the design specifications, with a timing bin variation of 40 ps for all 48 channels with a power consumption of about 6.5 mW per channel.
A new application-specific integrated circuit (ASIC), the high-speed charge-to-time converter (QTC) IWATSU CLC101, provides three channels, each consisting of preamplifier, discriminator, low-pass filter, and charge integration circuitry, optimized for the waveform of a photomultiplier tube (PMT). This ASIC detects PMT signals using individual built-in discriminators and drives output timing signals whose width represents the integrated charge of the PMT signal. Combined with external input circuits composed of passive elements, the QTC provides full analog signal processing for the detector's…
Some preliminary thoughts on how to design and develop the DAQ architecture for the Silicon tracking system at the future Linear electron positron collider, are briefly presented here. The proposed structure includes three DAQ levels. The first level is based on a high level processing mix-mode ASIC sitting on the detector. The second level still on the detector is a DSP like interface that will send the processed data to the general DAQ system. Several novel technological aspects are part of this development. The role of the ongoing test beam activities with detector prototypes as training ca…
Caribou is a flexible open-source DAQ system developed and used within several collaborative frameworks (CERN EP R&D, RD50, AIDAinnova) for laboratory and high-rate beam tests and easy integration of new silicon-pixel detector prototypes. It uses common hardware, firmware and software components that are shared across different projects, thereby reducing the development effort and cost for such readout systems significantly. This contribution introduces the FASTPIX, APTS and DPTS detectors recently integrated in Caribou and their requirements in terms of waveform sampling and timing of digital…
A new $μ$TCA DAQ system was introduced in CANDLES experiment with SpaceWire-to-GigabitEthernet (SpaceWire-GigabitEthernet) network for data readout and Flash Analog-to-Digital Converters (FADCs). With SpaceWire-GigabitEthernet, we can construct a flexible DAQ network with multi-path access to FADCs by using off-the-shelf computers. FADCs are equipped 8 event buffers, which act as de-randomizer to detect sequential decays from the background. SpaceWire-GigabitEthernet has high latency (about 100 $μ$sec) due to long turnaround time, while GigabitEthernet has high throughput. To reduce dead-time,…
Pixelated PET systems produce higher count rates as they integrate several detecting channels per detector module. An increased data flow from the detectors posses higher needs on the bandwidth requirements. We aim to optimize the bandwidth usage efficiency by filtering on the fly the detected events with non valid energies. PET systems with a SiPM-ASIC readout scheme are being extensively used to get enhanced images on Time-Of-Flight PET scanners. These kind of digital readout systems are specially interesting for the application of on-line processing techniques given the ease of access to ea…
We present the design and performance of a prototype ASIC digitizer for integrated wire chamber readout, implemented in 65 nm commercial CMOS technology. Each channel of the 4-channel prototype is composed of two 16-bit Time-to-Digital Converters (TDCs), one 8-bit Analog-to-Digital Converter (ADC), a front-end preamplifier and shaper, plus digital and analog buffers that support a variety of digitization chains. The prototype has a multiplexed digital backend that executes a state machine, distributes control and timing signals, and buffers data for serial output. Laboratory bench tests measur…
This work reports a cost-effective, simple front-end readout and DAQ of a RPC-based muon scattering tomography system under construction. The Time-over-threshold property of NINO ASICs has been exploited to achieve precise tracking by extraction of position information. The use of a low-cost FPGA for event selection and TOT measurement has been demonstrated for a prototype RPC which has been triggered by a cosmic ray hodoscope of three plastic scintillators. The relation between input pulse width and TOT has been established by analyzing the waveforms of the RPC signals. The TOT profile at dif…
In this paper, we present a complete Data Acquisition System (DAQ) together with the readout mechanisms for the J-PET tomography scanner. In general detector readout chain is constructed out of Front-End Electronics (FEE), measurement devices like Time-to-Digital or Analog-to-Digital Converters (TDCs or ADCs), data collectors and storage. We have developed a system capable for maintaining continuous readout of digitized data without preliminary selection. Such operation mode results in up to 8 Gbps data stream, therefore it is required to introduce a dedicated module for online event building …
We present the first characterization results of Timespot1, an ASIC designed in CMOS 28 nm technology, featuring a $32 \times 32$ pixel matrix with a pitch of $55 ~ μm$. Timespot1 is the first small-size prototype, conceived to readout fine-pitch pixels with single-hit time resolution below $50 ~ ps_\text{rms}$ and input rates of several hundreds of kilohertz per pixel. Such experimental conditions will be typical of the next generation of high-luminosity collider experiments, from the LHC run5 and beyond. Each pixel of the ASIC includes a charge amplifier, a discriminator, and a Time-to-Digit…
A front-end readout electronics system has been developed for silicon strip detectors. The system uses an application specific integrated circuit (ASIC) ATHED to realize multi-channel E&T measurement. The slow control of ASIC chips is achieved by parallel port and the timing control signals of ASIC chips are provided by the CPLD. The data acquisition is implemented with a PXI-DAQ card. The system software has a user-friendly GUI which uses LabWindows/CVI in Windows XP operating system. Test results showed that the energy resolution is about 1.22 % for alphas at 5.48 MeV and the maximum channel…
Time and charge measurements over a large dynamic range from 1 Photo Electron (P.E.) to 4000 P.E. are required for the Water Cherenkov Detector Array (WCDA), which is one of the key components in the Large High Altitude Air Shower Observatory (LHAASO). To simplify the circuit structure of the readout electronics, a front end ASIC was designed. Based on the charge-to-time conversion method, the output pulse width of the ASIC corresponds to the input signal charge information while time information of the input signal is picked off through a discriminator, and thus the time and charge informatio…
The Large High Altitude Air Shower Observatory (LHAASO) is designed for high energy gamma ray and cosmic ray detection. A Water Cherenkov Detector Array which is sensitive to gamma ray showers above a few hundred GeV is proposed to survey gamma ray sources. The WCDA consists of 3600 PhotoMultiplier Tubes (PMT) which collect the Cherenkov light produced by the shower particles in water. Both high precision time and charge measurement are required over a large dynamic range from 1 photo electron (P.E.) to 4000 P.E. Prototype of an analogue front-end Application Specific Integrated Circuit (ASIC)…
The Large High Altitude Air Shower Observatory is in the R&D phase, in which the Water Cherenkov Detector Array is an important part. The signals of Photo-Multiplier Tubes would vary from single photo electron to 4000 photo electrons, and both high precision charge and time measurement is required. To simplify the signal processing chain, the charge-to-time conversion method is employed. A prototype of the front-end readout ASIC is designed and fabricated in Chartered 0.35 μm CMOS technology, which integrates time disctrimination and converts the input charge information to pulse widths. With …
Wavelength-dispersive spectrometers (WDS) are often used in synchrotron and FEL applications where high energy resolution (in the order of eV) is important. Increasing WDS energy resolution requires increasing spatial resolution of the detectors in the dispersion direction. The common approaches with strip detectors or small pixel detectors are not ideal. We present a novel approach, with a sensor using rectangular pixels with a high aspect ratio (between strips and pixels, further called "strixels"), and strixel redistribution to match the square pixel arrays of typical ASICs while avoiding t…
The continued desire for X-ray pixel detectors with higher frame rates will stress the ability of application-specific integrated circuit (ASIC) designers to provide sufficient off-chip bandwidth to reach continuous frame rates in the 1 MHz regime. To move from the current 10 kHz to the 1 MHz frame rate regime, ASIC designers will continue to pack as many power-hungry high-speed transceivers at the periphery of the ASIC as possible. In this paper, however, we present new strategies to make the most efficient use of the off-chip bandwidth by utilizing data compression schemes for X-ray photon-c…
In order to reconstruct gamma-gamma physics events tagged with High Energy Tagger (HET) in the KLOE-2 (K LOng Experiment 2), we need to measure the Time Of Flight (TOF) of the electrons and positrons from the KLOE-2 Interaction Point (IP) to our tagging stations (11 m apart). The required resolution must be better than the bunch spacing (2.7 ns). We have developed and implemented on a Xilinx Virtex-5 FPGA a Time to Digital Converter (TDC) with 625 ps resolution (LSB) along with an embedded data acquisition system and the interface to the online FARM of KLOE-2. We will describe briefly the arch…
The water Cherenkov detector array (WCDA) is one of the key detectors in the large high altitude air shower observatory (LHAASO), which is proposed for very high gamma ray source survey. In WCDA, there are more than 3000 photomultiplier tubes (PMTs) scattered under water in an area of 80000 m2. As for the WCDA readout electronics, both high precision time and charge measurement is required over a large dynamic range from 1 photon electron (P.E.) to 4000 P.E. To reduce the electronics complexity and improve the system reliability, a readout scheme based on application specific integrated circui…
CANDLES experiment in Kamioka Underground Observatory aims to obtain the neutrino-less double beta decay ($0νββ$) from $^{48}$Ca. This measurement is a big challenge due to the extremely rare decay rate of $^{48}$Ca. Thus, in order to obtain 0νββ, it is needed to reduce background as much as possible. Series of alpha and beta decays originated from radioactive impurities can remain as background in the energy region of $0νββ$. Because they are sequential decays, we can remove them by tagging preceding and following events. This tagging method requires minimized dead-time of DAQ system. A new D…
PARISROC is a complete read out chip, in AMS SiGe 0.35 !m technology, for photomultipliers array. It allows triggerless acquisition for next generation neutrino experiments and it belongs to an R&D program funded by the French national agency for research (ANR) called PMm2: ?Innovative electronics for photodetectors array used in High Energy Physics and Astroparticles? (ref.ANR-06-BLAN-0186). The ASIC (Application Specific Integrated Circuit) integrates 16 independent and auto triggered channels with variable gain and provides charge and time measurement by a Wilkinson ADC (Analog to Digital C…
The Kaos spectrometer is maintained by the A1 collaboration at the Mainz Microtron MAMI with a focus on the study of (e,e'K^+) coincidence reactions. For its electron-arm two vertical planes of fiber arrays, each comprising approximately 10 000 fibers, are operated close to zero degree scattering angle and in close proximity to the electron beam. A nearly dead-time free DAQ system to acquire timing and tracking information has been installed for this spectrometer arm. The signals of 144 multi-anode photomultipliers are collected by 96-channel front-end boards, digitized by double-threshold dis…
Operating HADES at the future FAIR SIS-100 accelerator challenges the rate capability of DAQ and electronics. A new, more robust version of front-end electronics needs to be built for the HADES drift chamber system. Due to the unavailability of the previously used ASD-8 analog read-out ASIC, PASTTREC (PANDA straw tube read-out ASIC) was tested as an ASD-8 replacement in different scenarios including a beam test. PASTTREC falls 20% short of the ASD-8 time precision but performs better w.r.t. signal charge measurements and overall operation stability. The measured time precision as a function of…
High precision and large dynamic range measurement are required in the readout systems for the Water Cherenkov Detector Array (WCDA) in Large High Altitude Air Shower Observatory (LHAASO). This paper presents a prototype of 12-bit 40 MSPS Analog-to-Digital Converter (ADC) Application Specific Integrated Circuit (ASIC) designed for the readout of LHAASO WCDA. Combining this ADC and the front-end ASIC finished in our previous work, high precision charge measurement can be achieved based on the digital peak detection method. This ADC is implemented based on power-efficient Successive Approximatio…
Time to Digital Converters (TDCs) are very common devices in particles physics experiments. A lot of "off-the-shelf" TDCs can be employed but the necessity of a custom DAta acQuisition (DAQ) system makes the TDCs implemented on the Field-Programmable Gate Arrays (FPGAs) desirable. Most of the architectures developed so far are based on the tapped delay lines with precision down to 10 ps, obtained with high FPGA resources usage and non-linearity issues to be managed. Often such precision is not necessary; in this case TDC architectures with low resources occupancy are preferable allowing the im…
ATLAS LAr calorimeter will perform its Phase-I upgrade during the long shut down (LS2) in 2018, a new LAr Trigger Digitizer Board (LTDB) will be designed and installed. Several commercial-off-the-shelf (COTS) multichannel high-speed ADCs have been selected as possible backups of the radiation tolerant ADC ASICs for LTDB. In order to evaluate the radiation tolerance of these back up commercial ADCs, we developed an ADC radiation tolerance characterization system, which includes the ADC boards, data acquisition (DAQ) board, signal generator, external power supplies and a host computer. The ADC b…
PSEC6: an 8-Channel 40 GSa/s Waveform Sampling ASIC in TSMC 65nm with 10.24 GHz PLL
Enrico Fermi Institute, the University of Chicago（芝加哥大学恩里科·费米研究所）；Fermi National Accelerator Laboratory（费米国家加速器实验室）；Stanford University（斯坦福大学）；North Central College（北中央学院）
A time-to-digital converter with steady calibration through single-photon detection
Università degli Studi di Padova（帕多瓦大学）；Padua Quantum Technologies Research Center, Università degli Studi di Padova（帕多瓦量子技术中心，帕多瓦大学）；Istituto Nazionale di Fisica Nucleare (INFN) – sezione di Padova（意大利国家核物理研究所（INFN）帕多瓦分部）
Muon Spin Rotation, Relaxation and Resonance (μSR) technology has an irreplaceable role in studying the microstructure and properties of materials, especially micro-magnetic properties. An experimental muon source is being built in China Spallation Neutron Source (CSNS) now. At the same time, a 128-channel μSR spectrometer as China's first μSR spectrometer is being developed. The time spectrum of μSR can be obtained by fitting the curve of positron count rate with time. This paper presents a 32-channel Time-to-Digital Converter (TDC) implemented in a Xilinx Virtex-6 Field Programmable Gate Arr…
The CMS Phase-1 pixel detector was extracted from the underground cavern after the end of the LHC Run-2 in 2019 and has been kept cold to protect the silicon sensors during the long shutdown period (LS2) in 2019-2021. The LHC is now preparing for the next installment of the data taking beginning 2022. The Phase-1 pixel detector is scheduled to be installed this year and is going through a series of refurbishment and repairs to improve the quality of the collected data and enhance the operational experience. The innermost barrel layer has been replaced with new modules and features improved rea…
T0 detector, based on Multi-gap Resistive Plate Chambers (MRPC) technology, is one of the key components in the External Target Experiment. Through precision measurements of the MRPC signals, timing of the beam impact on target can be obtained and used as the start time for other detectors. A readout electronics system was designed for the T0 detector. Based on the NINO ASIC, front-end-electronics (FEE) circuits which can achieve high precision leading-edge discrimination and Charge-to-Time Conversion (QTC) were designed for the internal and external MRPCs of the T0 detector. The output pulse …
The CDEX (China Dark matter Experiment) is currently in the stage to upgrade to approximately 10 kg HPGe (High Purity Germanium) detectors (CDEX-10) in CJPL (China Jinping Underground Laboratory) and aims to detect the WIMP (Weakly Interacting Massive Particles). Six analog signals and one inhibited signal are outputted from preamplifier by one HPGe detector (~1 kg) of CDEX-10. The analog signals are conditioned with two 6-us and one 12-us shaping amplifiers, and three timing amplifiers respectively. The inhibited signal is used for trigger. The analog signals from shaping and timing amplifier…
We present the design and test results of a Time-to-Digital-Converter (TDC). The TDC will be a part of the readout ASIC, called ETROC, to read out Low-Gain Avalanche Detectors (LGADs) for the CMS Endcap Timing Layer (ETL) of High-Luminosity LHC upgrade. One of the challenges of the ETROC design is that the TDC is required to consume less than 200 W for each pixel at the nominal hit occupancy of 1%. To meet the low-power requirement, we use a single delay line for both the Time of Arrival (TOA) and the Time over Threshold (TOT) measurements without delay control. A double-strobe self-calibratio…
The Short Baseline Near Detector (SBND) is one of three liquid argon (LAr) neutrino detectors sitting in the Booster Neutrino Beam (BNB) at Fermilab as part of the Short Baseline Neutrino (SBN) program. The detector is in a cryostat holding 260-ton of LAr and consists of four 2.5 m (L) $\times$ 4 m (W) Anode Plane Assembles (APAs) and two Cathode Plane Assemblies (CPAs), which leads to 11,264 Time Projection Chamber (TPC) readout channels and two separate 2 m long drift regions. As an enabling technology, Cold Electronics (CE) developed for cryogenic temperature operation makes possible an opt…
Development of a high-granularity, high-precision timing readout electronics system for large-area MRPC detectors
Institute of Nuclear and Particle Physics, School of Physics and Astronomy, Shanghai Jiao Tong University（上海交通大学物理与天文学院核粒子物理研究所）；Key Laboratory for Particle Astrophysics and Cosmology (MoE), Shanghai Key Laboratory for Particle Physics and Cosmology（教育部粒子天体物理与宇宙学重点实验室，上海粒子物理与宇宙学重点实验室）；Institut de Physique des 2 Infinis de Lyon, Lyon University（里昂大学里昂双无限物理研究所）；Institute of High Energy Physics, Chinese Academy of Sciences（中国科学院高能物理研究所）
本研究针对含2400个2*2 cm pad通道的大面积MRPC探测器，研发了由FEBs、时钟模块、DAQ聚合器及PETIROC2B ASIC组成的高粒度高精度定时读出系统，其单通道时间分辨率达33 ps RMS，可应用于多种定时探测器场景。
We present a readout chip prototype for future pixel detectors with timing capabilities. The prototype is intended for characterizing 4D pixel arrays with a pixel size of $100\times100~μ\text{m}^2$, where the sensors are Low Gain Avalanche Diodes (LGADs). The long-term focus is towards a possible replacement of disks in the extended forward pixel system (TEPX) of the CMS experiment during the High Luminosity LHC (HL-LHC). The requirements for this ASIC are the incorporation of a Time to Digital Converter (TDC) within each pixel, low power consumption, and radiation tolerance up to $5\times10^{…
