具有单光子检测的稳定校准时间到数字转换器
A time-to-digital converter with steady calibration through single-photon detection
AI总结：
本研究提出了一种基于FPGA的时间到数字转换器，通过单光子检测实现稳定校准，具有低抖动和高稳定性，适用于量子密钥分发等应用。
摘要：
时间到数字转换器（TDC）是许多领域中至关重要的工具，特别是在量子通信中，时间标记器的性能可能严重影应用的整体质量。如今，基于FPGA的TDCs提供了一种替代ASIC的可行方案，一旦设备的非线性行为由于其本质特性得到适当缓解。为了补偿这些非线性，需要一个校准程序，该程序应在整个运行时间内保持稳定。在这里，我们展示了基于FPGA的TDC设计和演示，其残余FWHM抖动为27 ps，可扩展用于多通道操作。在量子密钥分发（QKD）中的目标应用通过利用单光子检测的校准方法进行讨论，该方法不需要停止数据采集或使用任何估计方法，从而提高准确性和消除数据丢失。校准在相关环境中进行了测试，研究了设备在5°C到80°C之间的行为。此外，我们的设计能够连续流式传输高达12 Mevents/s，持续约一周，而不会使TDC溢出，使其准备好用于真实场景的部署。
英文摘要：
Time-to-Digital Converters (TDCs) are a crucial tool in a wide array of fields, in particular for quantum communication, where time taggers performance can severely affect the quality of the entire application. Nowadays, FPGA-based TDCs present a viable alternative to ASIC ones, once the non-linear behavior due to the intrinsic nature of the device is properly mitigated. To compensate for said nonlinearities, a calibration procedure is required, which should be maintained throughout its runtime. Here we present the design and the demonstration of a TDC that is FPGA-based showing a residual FWHM jitter of 27 ps, that is scalable for multichannel operation. The target application in Quantum Key Distribution (QKD) is discussed with a calibration method based on the exploitation of single-photon detection that does not require stopping the data acquisition or using any estimation methods, thus increasing accuracy and removing data loss. The calibration was tested in a relevant environment, investigating the behavior of the device between 5 °C and 80 °C. Moreover, our design is capable of continuously streaming up to 12 Mevents/s for up to ~1 week without the TDC overflowing making it ready for a real-life scenario deployment.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
