We have developed a fabrication technology for the development of large-scale superconducting integrated circuits with Nb-based Josephson junctions. The standard fabrication process with 10 mask levels uses four metal layers including 3 Nb superconducting layers and a Mo resistor layer. The influence of deposition parameters on film stress, electrical properties, and surface roughness were studied systematically. High quality Nb, Al, Mo, and SiO2 films were successfully deposited for the subsequent fabrication of circuits. The circuit fabrication started with the fabrication of Mo resistors with a target sheet resistance Rsh of 2 Ome, followed by the deposition of Josephson-junction. The target critical current density Jc was set at 6 kA per cm2. The thicknesses and etch depths of the films were monitored during fabrication with on-wafer process-control-monitor (PCM) patterns for all the wafers.
Superconductor electronics fabrication technology developed at MIT Lincoln Laboratory enables the development of VLSI digital circuits with millions of Josephson junctions per square centimeter. However, conventional DC and multi-phase AC biasing techniques already encounter serious challenges for scaling circuits above several hundred thousand junctions. In this work, we propose a novel AC-based biasing scheme for RSFQ-type logic families requiring DC bias. The major step toward this scheme is a superconducting AC/DC rectifier which we introduced at ASC 2014. Initially, we proposed to connect…
Recent progress of Reciprocal Quantum Logic (RQL) has renewed interest in AC powering of superconductor digital circuits, which had been abandoned since the famous IBM project of 1970s. In this work we propose and demonstrate new AC-biased Single Flux Quantum (SFQ) circuits, and search for synergy of AC and currently dominating DC biasing schemes. As the first step, we suggest an on-chip AC/DC converter capable of feeding a few DC-biased gates surrounded by their AC-biased counterparts. As the second step, we introduce and present the first successful demonstration of a new AC-powered circuit …
Superconducting single-flux-quantum (SFQ) circuits have so far been developed and optimized for operation at or above helium temperatures. The SFQ approach, however, should also provide potentially viable and scalable control and read-out circuits for Josephson-junction qubits and other applications with much lower, milli-kelvin, operating temperatures. This paper analyzes the overheating problem which becomes important in this new temperature range. We suggest a thermal model of the SFQ circuits at sub-kelvin temperatures and present experimental results on overheating of electrons and silico…
We review the salient features of two advanced nodes of an 8-Nb-layer fully planarized process developed recently at MIT Lincoln Laboratory for fabricating Single Flux Quantum(SFQ) digital circuits with very large scale integration on 200-mm wafers: the SFQ4ee and SFQ5ee nodes, where 'ee' denotes the process is tuned for energy efficient SFQ circuits. The former has eight superconducting layers with 0.5 μm minimum feature size and a 2 Ω/sq Mo layer for circuit resistors. The latter has nine superconducting layers: eight Nb wiring layers with the minimum feature size of 350 nm and a thin superc…
High-fidelity gate operations are essential to the realization of a fault-tolerant quantum computer. In addition, the physical resources required to implement gates must scale efficiently with system size. A longstanding goal of the superconducting qubit community is the tight integration of a superconducting quantum circuit with a proximal classical cryogenic control system. Here we implement coherent control of a superconducting transmon qubit using a Single Flux Quantum (SFQ) pulse driver cofabricated on the qubit chip. The pulse driver delivers trains of quantized flux pulses to the qubit …
We investigate Magnetic Josephson Junction (MJJ) - a superconducting device with ferromagnetic barrier for a scalable high-density cryogenic memory compatible with energy-efficient single flux quantum (SFQ) circuits. The superconductor-insulator-superconductor-ferromagnet-superconductor (SIS'FS) MJJs are analyzed both experimentally and theoretically. We found that the properties of SIS'FS junctions fall into two distinct classes based on the thickness of S' layer. We fabricate Nb-Al/AlOx-Nb-PdFe-Nb SIS'FS MJJs using a co-processing approach with a combination of HYPRES and ISSP fabrication pr…
Recent progress in superconductor electronics fabrication has enabled single-flux-quantum (SFQ) digital circuits with close to one million Josephson junctions (JJs) on 1-cm$^2$ chips. Increasing the integration scale further is challenging because of the large area of SFQ logic cells, mainly determined by the area of resistively shunted Nb/AlO$_x$-Al/Nb JJs and geometrical inductors utilizing multiple layers of Nb. To overcome these challenges, we are developing a fabrication process with self-shunted high-J$_c$ JJs and compact thin-film MoN$_x$ kinetic inductors instead of geometrical inducto…
We develop a fast Magnetic Josephson Junction (MJJ) - a superconducting ferromagnetic device for a scalable high-density cryogenic memory compatible in speed and fabrication with energy-efficient Single Flux Quantum (SFQ) circuits. We present experimental results for Superconductor-Insulator-Ferromagnet-Superconductor (SIFS) MJJs with high characteristic voltage IcRn of >700 uV proving their applicability for superconducting circuits. By applying magnetic field pulses, the device can be switched between MJJ logic states. The MJJ IcRn product is only ~30% lower than that of conventional junctio…
Superconducting single flux quantum (SFQ) circuits can process information at extremely high speeds, in the range of hundreds of GHz. SFQ circuits are based on Josephson junction cells for switching logic and ballistic transmission for transferring SFQ pulses. Multi-chip modules (MCM) are often used to implement larger complex designs, which cannot be fit onto a single chip. We have optimized the design of wideband interconnects for transferring signals and SFQ pulses between chips in flip-chip MCMs and evaluated the importance of several design parameters such as the geometry of bump pads on …
Quantum computing using superconducting circuits underwent rapid development in the last decade. This field has propelled from quantum manipulation of single two-level systems to complex designs employing multiple coupled qubits allowing one to execute simple quantum algorithms. On the way to a practical quantum computer, a need for scalable interfaces between classical circuits and the quantum counterparts has arisen. Low-temperature superconducting single-flux quantum (SFQ) logic employs magnetic fluxons in Josephson transmission lines (JTLs) as basic bits for classical computation. Here, we…
Single flux quantum (SFQ) based circuits are the subject of renewed attention due to their high speed and their very high energy efficiency. However, the need of cryogenic temperature, the complex physics of Josephson junctions and the lack of proper EDA tools causes slow progress in the field of superconducting electronics. In this work we introduce a new open source program named JOsephson INterface Utility Software (JOINUS [1]) that incorporates SPICE-based simulator engines, improved physical models and several powerful built-in routines. JOINUS is based on a user-friendly environment avai…
Digital-analog concept for superconducting perceptron-like neural networks
Skobeltsyn Institute of Nuclear Physics, Lomonosov Moscow State University（莫斯科国立大学索博列夫核物理研究所）；Moscow Technical University of Communications and Informatics (MTUCI)（莫斯科通信与信息技术大学）；Superconducting Quantum Computing Lab, Quantum Center, Skolkovo（斯科尔科沃量子中心超导量子计算实验室）；Kotelnikov Institute of Radioengineering and Electronics（科尔涅利尼科夫无线电工程与电子学研究所）
Using a fully automated cryogenic wafer prober, we measured superconductor fabrication process control monitors and simple integrated circuits on 200 mm wafers at 4.4 K, including SQIF-based magnetic field sensors, SQUID-based circuits for measuring inductors, Nb/Al-AlOx/Nb Josephson junctions, test structures for measuring critical current of superconducting wires and vias, resistors, etc., to demonstrate the feasibility of using the system for characterizing niobium superconducting devices and integrated circuits on a wafer scale. Data on the wafer-scale distributions of the residual magneti…
We develop an ac-biased shift register introduced in our previous work (V.K. Semenov et al., IEEE Trans. Appl. Supercond., vol. 25, no. 3, 1301507, June 2015) into a benchmark circuit for evaluation of superconductor electronics fabrication technology. The developed testing technique allows for extracting margins of all individual cells in the shift register, which in turn makes it possible to estimate statistical distribution of Josephson junctions in the circuit. We applied this approach to successfully test registers having 8, 16, 36, and 202 thousand cells and, respectively, about 33000, 6…
Arrays of Vortex Transitional (VT) memory cells with functional density up to $1 Mbit/cm^2$ have been designed, fabricated, and successfully demonstrated. This progress is due to recent advances in design optimization and in superconductor electronics fabrication achieved at MIT Lincoln Laboratory. As a starting point, we developed a demo array of VT cells for the 100-$μA/μm^2$ MIT LL fabrication process SFQ5ee with 8 niobium layers. The studied two-junction memory cell with a two-junction nondestructive readout occupied $168 μm^2$, resulting in an over $0.5 Mbit/cm^2$ functional density. Then…
Characterization of Flux Trapping in and Fabrication of Large-Scale Superconductor Circuits Using AC-Biased Shift Registers With 108500 Josephson Junctions
Josephson junction circuits, such as superconducting quantum interference devices (SQUIDs) and single-flux-quantum (SFQ) circuits, have been successfully applied in both analog and digital electronic domains. They are considered to be distinct from the normal resistor-inductor-capacitor (RLC) circuits, due to the superconducting physics. To bridge the gap between Josephson junction circuits and conventional RLC circuits, we introduce a magnetic-flux-generator (MFG) model to unify the definitions of Josephson junctions and normal noninductive components, and transform their circuits uniformly i…
Superconductor digital electronics using Josephson junctions as ultrafast switches and magnetic-flux encoding of information was proposed over 30 years ago as a sub-terahertz clock frequency alternative to semiconductor electronics based on complementary metal-oxide-semiconductor (CMOS) transistors. Recently, interest in developing superconductor electronics has been renewed due to a search for energy saving solutions in applications related to high-performance computing. The current state of superconductor electronics and fabrication processes are reviewed in order to evaluate whether this el…
We report the first experimental demonstration of recently proposed energy-efficient single flux quantum logic, eSFQ. This logic can represent the next generation of RSFQ logic eliminating dominant static power dissipation associated with a dc bias current distribution and providing over two orders of magnitude efficiency improvement over conventional RSFQ logic. We further demonstrate that the introduction of passive phase shifters allows the reduction of dynamic power dissipation by about 20%, reaching ~0.8 aJ per bit operation. Two types of demonstration eSFQ circuits, shift registers and d…
Currently, superconductor digital integrated circuits fabricated at HYPRES, Inc. can operate at clock frequencies of ~ 40 GHz. The circuits present multilayered structures containing tens of thousands of Nb/Al/AlOx/Nb Josephson junctions (JJs) of various sizes interconnected by four Nb wiring layers, resistors, and other circuit elements. In order to be operational, the integrated circuits should be fabricated such that the critical currents of Josephson junctions remain within the tight design margins and the proper relationships between the critical currents of JJs of different sizes are pre…
Data are presented on mutual and self-inductance of various inductors used in multilayered superconductor integrated circuits: microstrips and striplines with widths of signal traces from 250 nm to a few micrometers, located on the same circuit layer at various distances from each other (from 250 nm to a few micrometers) and/or on different layers spaced vertically; effect of long slits in the ground plane(s) along the inductors on their mutual inductance; inductance of right-angled bends; inductance of meanders. Simple analytical expressions for mutual and self-inductance of the basic inducto…
We present our new fabrication Process for Superconductor Electronics (PSE2) that integrates two (2) layers of Josephson junctions in a fully planarized multilayer process on 200-mm wafers. The two junction layers can be, e.g., conventional Superconductor-Insulator-Superconductor (SIS) Nb/Al/AlO_x/Nb junctions with the same or different Josephson critical current densities, J_c. The process also allows integration of high-J_c Superconductor-Ferromagnet-Superconductor (SFS) or SFS'S JJs on the first junction layer with Nb/Al/AlO_x/Nb trilayer junctions on the second junction layer, or vice vers…
Data are presented on inductance of various features used in superconductor digital integrated circuits such as microstrip and stripline inductors with linewidths down to 120 nm and different combinations of ground plane layers, effect of perforations of various sizes in the ground planes and their distance to the inductors on inductance, inductance of vias of various sizes between adjacent layers and composite vias between distant superconducting layers. Effects of magnetic flux trapping in ground plane moats on coupling to nearby inductors are discussed for circuit cooling in a residual fiel…
In this work, we briefly overview various options for Josephson junctions which should be scalable down to nanometer range for utilization in nanoscale digital superconducting technology. Such junctions should possess high values of critical current, $I_c$, and normal state resistance, $R_n$. Another requirement is the high reproducibility of the junction parameters across a wafer in a fabrication process. We argue that Superconductor - Normal metal - Superconductor (SN-N-NS) Josephson junction of "variable thickness bridge" geometry is a promising choice to meet these requirements. Theoretica…
Inductance of superconducting thin-film inductors and structures with linewidth down to 250 nm has been experimentally evaluated. The inductors include various striplines and microstrips, their 90-degree bends and meanders, interlayer vias, etc., typically used in superconducting digital circuits. The circuits have been fabricated by a fully planarized process with 8 niobium layers, developed at MIT Lincoln Laboratory for very-large-scale superconducting integrated circuits. Excellent run-to-run reproducibility and inductance uniformity of better than 1% across 200-mm wafers have been found. I…
Disentangling superconductor and dielectric microwave losses in sub-micron $\rm Nb$/$\rm TEOS-SiO_2$ interconnects using a multi-mode microstrip resonator
A fabrication process has been developed for fully planarized Nb-based superconducting inter-layer connections (vias) with minimum size down to 250 nm for superconductor very large scale integrated (VLSI) circuits with 8 and 10 superconducting layers on 200-mm wafers. Instead of single Nb wiring layers, it utilizes Nb/Al/Nb trilayers for each wiring layer to form Nb pillars (studs) providing vertical connections between the wires etched in the bottom layer of the trilayer and the next wiring layer that is also deposited as a Nb/Al/Nb trilayer. This technology makes possible a dramatic increase…
