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arXiv 1302.1940cond-mat.mes-hallphysics.comp-ph
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纳米线相变存储器的标度分析

Scaling Analysis of Nanowire Phase Change Memory

Jie Liu, Bin Yu, M. P. Anantram

摘要:

本文采用解析和数值方法分析了纳米线相变存储器的标度特性。研究和比较了三种广泛使用的NW PCM操作方案(恒定电场、电压和电流)的缩放方案。结果表明,如果器件尺寸缩小1/k(k>1),则工作能量(电流)将降低k3(k)倍以上,工作速度将提高k2倍。它还表明,超过90%的操作能量被浪费在基板和电极的热通量。我们预测,如果通过热约束技术有效地减少浪费的热通量,则每次重复操作所消耗的能量可以从约1 pJ降低到小于100 fJ。结果表明,减小NW纵横比(AR)有助于降低PCM能耗。据透露,跨细胞的热邻近干扰是反直观地减轻缩放,导致一个理想的缩放方案。

英文摘要:

This letter analyzes the scaling property of nanowire (NW) phase change memory (PCM) using analytic and numerical methods. The scaling scenarios of the three widely-used NW PCM peration schemes (constant electric field, voltage, and current) are studied and compared. It is shown that if the device size is downscaled by a factor of 1/k (k>1), the peration energy (current) will be reduced by more than k3 (k) times, and the operation speed will be increased by k2 times. It is also shown that more than 90% of operation energy is wasted as thermal flux into substrate and electrodes. We predict that, if the wasted thermal flux is effectively reduced by heat confinement technologies, the energy consumed per RESET operation can be decreased from about 1 pJ to less than 100 fJ. It is shown that reducing NW aspect ratio (AR) helps decreasing PCM energy consumption. It is revealed that cross-cell thermal proximity disturbance is counter-intuitively alleviated by scaling, leading to a desirable scaling scenario.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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