We report direct measurements of the potential barriers and electronic coupling between nanowire segments within a sketch-based oxide nanotransistor (SketchFET) device. Near room temperature, switching is governed by thermally activation across a potential barrier controlled by the nanowire gate. Below T=150 K, a crossover to quantum field emission is observed that is sensitive to structural phase transitions in the SrTiO3 layer. This direct measurement of the source-drain and gate-drain energy barriers is crucial for the development of room-temperature logic and memory elements and low-temperature quantum devices.
The interface between polar LaAlO3 and non-polar SrTiO3 exhibits a remarkable variety of electronic behavior associated with the formation of an interfacial quasi-two-dimensional electron gas (q-2DEG). By "sketching" patterns of charge on the top LaAlO3 surface, the LaAlO3/SrTiO3 interface conductance can be controlled with near-atomic spatial resolution. Using this technique, a sketch-based oxide nanotransistor (SketchFET) was demonstrated with a minimum feature size of just two nanometers. Here we report direct measurements of the potential barriers and electronic coupling between nanowire s…
We report on the observation of Coulomb oscillations from localized quantum dots superimposed on the normal hopping current in ZnO nanowire transistors. The Coulomb oscillations can be resolved up to 20 K. Positive anisotropic magnetoresistance has been observed due to the Lorentz force on the carrier motion. Magnetic field-induced tunneling barrier transparency results in an increase of oscillation amplitude with increasing magnetic field. The energy shift as a function of magnetic field indicates electron wavefunction modification in the quantum dots.
We compare the electronic characteristics of nanowire field-effect transistors made using single pure wurtzite and pure zincblende InAs nanowires with nominally identical diameter. We compare the transfer characteristics and field-effect mobility versus temperature for these devices to better understand how differences in InAs phase govern the electronic properties of nanowire transistors.
The high-frequency transconductance and current noise of top-gated single carbon nanotube transistors have been measured and used to investigate hot electron effects in one-dimensional transistors. Results are in good agreement with a theory of 1-dimensional nano-transistor. In particular the prediction of a large transconductance correction to the Johnson-Nyquist thermal noise formula is confirmed experimentally. Experiment shows that nanotube transistors can be used as fast charge detectors for quantum coherent electronics with a resolution of $13\mathrm{μe/\sqrt{Hz}}$ in the 0.2-$0.8 \mathr…
We report the batch fabrication of graphene field-effect-transistors (GFETs) with nanoperforated graphene as channel. The transistors were cut and encapsulated. The encapsulated GFETs display saturation regions that can be tuned by modifying the top gate voltage, and have on/off ratios of up to 10^8 at room temperature. In addition, the nanoperforated GFETs display orders of magnitude higher photoresponses than any room-temperature graphene detector configurations that do not involve heterostructures with bandgap materials.
Inspired by recent experimental realizations and theoretical simulations of thin silicon nanowire-based devices, we perform predictive first-principles simulations of junctionless gated Si nanowire transistors. Our primary predictions are that Si-based transistors are physically possible without major changes in design philosophy at scales of ~1 nm wire diameter and ~3 nm gate length, and that the junctionless transistor may be the only physically sensible design at these length scales. We also present investigations into atomic-level design factors such as dopant positioning and concentration…
We report a theoretical model for a thermal transistor in dielectric four-terminal nanostructures based on mesoscopic ballistic phonon transport, in which a steady thermal flow condition of system is obtained to set up the temperature field effect of gate. In the environment, thermal flow shows the transisting behaviors at low temperatures: saturation, asymmetry, and rectification. The phenomena can be explained reasonably by the nonlinear variation of the temperature dependence of propagating phonon modes in terminals. The results suggest the possibility of the novel nano-thermal transistor f…
We use numerical simulations to analyze recent experimental measurements of short-channel carbon nanotube field-effect transistors with palladium contacts. We show that the gate strongly modulates the contact properties, an effect that is distinct from that observed in Schottky barrier carbon nanotube transistors. This modulation of the contacts by the gate allows for the realization of superior subthreshold swings for short channels, and improved scaling behavior. These results further elucidate the behavior of carbon nanotube-metal contacts, and should be useful in the optimization of high-p…
These comments aim to correct some apparent weaknesses in the theory of field electron emission given in a recent paper about nanoscale vacuum channel transistors, and to improve the presentation of this theory. In particular, it is argued that a "simplified" formula stated in the paper should not be used, because this formula is known to under-predict emission current densities by a large factor (typically around 300 for an emitting surface with local work function 4.5 eV). Thus, the "simplified" formula may significantly under-predict the practical performance of a nanoscale vacuum channel t…
We present an atomistic three-dimensional simulation of graphene nanoribbon field effect transistors (GNR-FETs), based on the self-consistent solution of the 3D Poisson and Schroedinger equation with open boundary conditions within the non-equilibrium Green's Function formalism and a tight-binding hamiltonian. With respect to carbon nanotube FETs, GNR-FETs exhibit comparable performance, reduced sensitivity on the variability of channel chirality, and similar leakage problems due to band-to-band tunneling. Acceptable transistor performance requires effective nanoribbon width of 1-2 nm, that co…
We analyze the performance of a recently reported Ge/Si core/shell nanowire transistor using a semiclassical, ballistic transport model and an sp3s*d5 tight-binding treatment of the electronic structure. Comparison of the measured performance of the device with the effects of series resistance removed to the simulated result assuming ballistic transport shows that the experimental device operates between 60 to 85% of the ballistic limit. For this ~15 nm diameter Ge nanowire, we also find that 14-18 modes are occupied at room temperature under ON-current conditions with ION/IOFF=100. To observe…
We report a method for making horizontal wrap-gate nanowire transistors with up to four independently controllable wrap-gated segments. While the step up to two independent wrap-gates requires a major change in fabrication methodology, a key advantage to this new approach, and the horizontal orientation more generally, is that achieving more than two wrap-gate segments then requires no extra fabrication steps. This is in contrast to the vertical orientation, where a significant subset of the fabrication steps needs to be repeated for each additional gate. We show that cross-talk between adjace…
We report on the experimental demonstration and electrical characterization of N = 7 armchair graphene nanoribbon (7-AGNR) field effect transistors. The back-gated transistors are fabricated from atomically precise and highly aligned 7-AGNRs, synthesized with a bottom-up approach. The large area transfer process holds the promise of scalable device fabrication with atomically precise nanoribbons. The channels of the FETs are approximately 30 times longer than the average nanoribbon length of 30 nm to 40 nm. The density of the GNRs is high, so that transport can be assumed well-above the percol…
Junctionless transistors made of silicon have previously been demonstrated experimentally and by simulations. Junctionless devices do not require fabricating an abrupt source-drain junction and thus can be easier to implement in aggressive geometries. In this paper, we explore a similar architecture for aggressively scaled devices with the channel consisting of doped carbon nanotubes (CNTs). Gate all around (GAA) field effect transistor (FET) structures are investigated for n- and p-type doping. Current-voltage characteristics and sub-threshold characteristics for a CNTbased junctionless FET i…
We use numerical simulations to investigate the effect of electrostatics on the source and drain contacts of carbon nanotube field-effect transistors. We find that unscreened charge on the nanotube at the contact-channel interface leads to a potential barrier that can significantly hamper transport through the device. This effect is largest for intermediate gate voltages and for contacts near the ohmic-Schottky crossover, but can be mitigated with a reduction in the gate oxide thickness. These results help to elucidate the important role that contact geometry plays in the performance of carbon…
We demonstrate sensitive and fast electrical measurements of a carbon nanotube mechanical resonator. The nanotube is configured as a single-electron transistor, whose conductance is a sensitive transducer for its own displacement. Using an impedance-matching circuit followed by a cryogenic amplifier, the vibrations can be monitored in real time. The sensitivity of this continuous displacement measurement approaches within a factor 470 of the standard quantum limit.
For carbon nanotube transistors, as for graphene, the electrical contacts are a key factor limiting device performance. We calculate the device characteristics as a function of nanotube diameter and metal workfunction. Although the on-state current varies continuously, the transfer characteristics reveal a relatively abrupt crossover from Schottky to ohmic contacts. We find that typical high-performance devices fall surprisingly close to the crossover. Surprisingly, tunneling plays an important role even in this regime, so that current fails to saturate with gate voltage as was expected due to…
Floating gate transistor is the basic building block of non-volatile flash memory, which is one of the most widely used memory gadgets in modern micro and nano electronic applications. Recently there has been a surge of interest to introduce a new generation of memory devices using graphene nanotechnology. In this paper we present a new floating gate transistor (FGT) design based on multilayer graphene nanoribbon (MLGNR) and carbon nanotube (CNT). In the proposed FGT a multilayer structure of graphene nanoribbon (GNR) would be used as the channel of the field effect transistor (FET) and a laye…
A nanoscale variable resistor consisting of a metal nanowire (active element), a dielectric, and a gate, is proposed. By means of the gate voltage, stochastic transitions between different conducting states of the nanowire can be induced, with a switching time as fast as picoseconds. With an appropriate choice of dielectric, the transconductance of the device, which may also be considered an ``electromechanical transistor,'' is shown to significantly exceed the conductance quantum G_0=2e^2/h, a remarkable figure of merit for a nanoscale device.
We investigate electronic transport properties of Schottky-barrier field-effect transistors (FET) based on double-walled carbon nanotubes (DWNT) with a semiconducting outer shell and a metallic inner one. These kind of DWNT-FET show asymmetries of the $I$-$V$ characteristics and threshold voltages due to the electron-hole asymmetry of the Schottky barrier. The presence of the metallic inner shell induces a large effective band gap, which is one order of magnitude larger than that due to the semiconducting shell alone of a single-walled carbon nanotube FET.
We describe single electron tunneling through molecular structures under the influence of nano-mechanical excitations. We develop a full quantum mechanical model, which includes charging effects and dissipation, and apply it to the vibrating C$_{60}$ single electron transistor experiment by Park {\em et al.} {[Nature {\bf 407}, 57 (2000)].} We find good agreement and argue vibrations to be essential to molecular electronic systems. We propose a mechanism to realize negative differential conductance using local bosonic excitations.
We present a novel reconfigurable metal-oxide-semiconductor multi-gate transistor that can host a quadruple quantum dot in silicon. The device consist of an industrial quadruple-gate silicon nanowire field-effect transistor. Exploiting the corner effect, we study the versatility of the structure in the single quantum dot and the serial double quantum dot regimes and extract the relevant capacitance parameters. We address the fabrication variability of the quadruple-gate approach which, paired with improved silicon fabrication techniques, makes the corner state quantum dot approach a promising …
In this paper we present our progress towards the opto-electronic characterization of indium phosphide (InP) nanowire transistors at milli-Kelvin (mK) temperatures. First, we have investigated the electronic transport of the InP nanowires by current-voltage (I-V) spectroscopy as a function of temperature from 300 K down to 40 K. Second, we show the successful operation of a red light emitting diode (LED) at liquid-Helium (and base) temperature to be used for opto-electronic device characterization.
We propose the manipulation of Majorana edge states via hybridization and spin currents in a nanowire spin transistor. The spin transistor is based on a heterostructure nanowire comprising of semiconductors with large and small g-factors that form the topological and non-topological regions respectively. The hybridization of bound edge states results in spin currents and $4π$-periodic torques, as a function of the relative magnetic field angle -- an effect which is dual to the fractional Josephson effect. We establish relation between torques and spin-currents in the non-topological region whe…
We propose an analytical device model for a graphene nanoribbon field-effect transistor (GNR-FET). The GNR-FET under consideration is based on a heterostructure which consists of an array of nanoribbons clad between the highly conducting substrate (the back gate) and the top gate controlling the dc and ac source-drain currents. Using the model developed, we derive explicit analytical formulas for the GNR-FET transconductance as a function of the signal frequency, collision frequency of electrons, and the top gate length. The transition from the ballistic and to strongly collisional electron tr…
This work investigates energy filtering in nanowires, where pass and stopbands are obtained by including superlattices in the wire. When a pair of such superlattices is placed in series, each being controlled by a gate, it can act as a transistor where the (mis-)alignment of its minibands turns the device on (off). It is shown that, in the ballistic current-regime, the transition between the on and off state occurs in a narrow gate-bias range, giving rise to sub-60 mV per decade switching behavior.
We report an electron-beam based method for the nanoscale patterning of the poly(ethylene oxide)/LiClO$_{4}$ polymer electrolyte. We use the patterned polymer electrolyte as a high capacitance gate dielectric in single nanowire transistors and obtain subthreshold swings comparable to conventional metal/oxide wrap-gated nanowire transistors. Patterning eliminates gate/contact overlap which reduces parasitic effects and enables multiple, independently controllable gates. The method's simplicity broadens the scope for using polymer electrolyte gating in studies of nanowires and other nanoscale de…
We have developed nano-scale double-gated field-effect-transistors for the study of electron states and transport properties of single deliberately-implanted phosphorus donors. The devices provide a high-level of control of key parameters required for potential applications in nanoelectronics. For the donors, we resolve transitions corresponding to two charge states successively occupied by spin down and spin up electrons. The charging energies and the Lande g-factors are consistent with expectations for donors in gated nanostructures.
We investigate by low-temperature transport experiments the sub-threshold behavior of triple-gate silicon field-effect transistors. These three-dimensional nano-scale devices consist of a lithographically defined silicon nanowire surrounded by a gate with an active region as small as a few tens of nanometers, down to 50x60x35 nm^3. Conductance versus gate voltage show Coulomb-blockade oscillations with a large charging energy due to the formation of a small potential well below the gate. According to dependencies on device geometry and thermionic current analysis, we conclude that sub-threshol…
In this letter, we explore the bandstructure effects on the performance of ballistic silicon nanowire transistors (SNWTs). The energy dispersion relations for silicon nanowires are evaluated with an sp3d5s* tight binding model. Based on the calculated dispersion relations, the ballistic currents for both n-type and p-type SNWTs are evaluated by using a semi-numerical ballistic model. For large diameter nanowires, we find that the ballistic p-SNWT delivers half the ON-current of a ballistic n-SNWT. For small diameters, however, the ON-current of the p-type SNWT approaches that of its n-type cou…
Radio-frequency reflectometry in silicon single-electron transistors (SETs) is presented. At low temperatures (<4 K), in addition to the expected Coulomb blockade features associated with charging of the SET dot, quasi-periodic oscillations are observed that persist in the fully depleted regime where the SET dot is completely empty. A model, confirmed by simulations, indicates that these oscillations originate from charging of an unintended floating gate located in the heavily doped polycrystalline silicon gate stack. The technique used in this experiment can be applied for detailed spectrosco…
We demonstrate that by means of a local top-gate current oscillations can be observed in extended, monolayered films assembled from monodisperse metal nanocrystals -- realizing transistor function. The oscillations in this metal-based system are due to the occurrence of a Coulomb energy gap in the nanocrystals which is tunable via the nanocrystal size. The nanocrystal assembly by the Langmuir-Blodgett method yields homogeneous monolayered films over vast areas. The dielectric oxide layer protects the metal nanocrystal field-effect transistors from oxidation and leads to stable function for mon…
The intermediate transport regime in nanoscale transistors between the fully ballistic case and the quasi equilibrium case described by the drift-diffusion model is still an open modeling issue. Analytical approaches to the problem have been proposed, based on the introduction of a backscattering coefficient, or numerical approaches consisting in the MonteCarlo solution of the Boltzmann transport equation or in the introduction of dissipation in quantum transport descriptions. In this paper we propose a very simple analytical model to seamlessly cover the whole range of transport regimes in ge…
We use a simultaneous flow of ethylene and hydrogen gases to grow single wall carbon nanotubes by chemical vapor deposition. Strong coupling to the gate is inferred from transport measurements for both metallic and semiconducting tubes. At low-temperatures, our samples act as single-electron transistors where the transport mechanism is mainly governed by Coulomb blockade. The measurements reveal very rich quantized energy level spectra spanning from valence to conduction band. The Coulomb diamonds have similar addition energies on both sides of the semiconducting gap. Signatures of subbands po…
It is usually assumed that tunneling current is fairly independent of temperature. By performing an atomistic transport simulation, we show, to the contrary, that the subthreshold tunneling current in a graphene nanoribbon (GNR) band-to-band tunneling transistor (TFET) should show significant and non-linear temperature dependence. Furthermore, the nature of this non-linearity changes as a function of source/drain doping and vertical electric field, indicating that such non-linearity, if properly understood, may provide important insights into the tunneling phenomena. Finally, by developing a p…
A nanoscale device consisting of a metal nanowire, a dielectric, and a gate is proposed. A combination of quantum and thermal stochastic effects enable the device to have multiple functionalities, serving alternately as a transistor, a variable resistor, or a simple resistive element with $I-V$ characteristics that can switch between ohmic and non-ohmic. By manipulating the gate voltage, stochastic transitions between different conducting states of the nanowire can be induced, with a switching time as short as picoseconds. With an appropriate choice of dielectric, the transconductance of the d…
In our previous papers on ballistic quantum transport in nano-transistors [J. Appl. Phys. 98, 84308 (2005)] it was demonstrated that under certain conditions it is possible to reduce the three-dimensional transport problem to an effectively one-dimensional one. We show that such an effectively one-dimensional description can be cast in a scale-invariant form. We obtain dimensionless variables for the characteristic channel length $l$ and width of the transistor which determine the scale-invariant output characteristic. For $l \gtrsim 10$, in the strong barrier regime, the output characteristic…
The 1/f noise in individual semiconducting carbon nanotubes (s-CNT) in a field effect transistor configuration has been measured in ultra-high vacuum and following exposure to air. The amplitude of the normalized current spectral noise density is independent of source-drain current, indicating the noise is due to mobility rather than number fluctuations. Hooge's constant for s-CNT is found to be 9.3 plus minus 0.4x10^-3. The magnitude of the 1/f noise is substantially degreased by exposing the devices to air.
High performance enhancement mode semiconducting carbon nanotube field-effect transistors (CNTFETs) are obtained by combining ohmic metal-tube contacts, high dielectric constant HfO2 films as gate insulators, and electrostatically doped nanotube segments as source/drain electrodes. The combination of these elements affords high ON currents, subthreshold swings of ~ 70-80 mV/decade, and allows for low OFF currents and suppressed ambipolar conduction. The doped source and drain approach resembles that of MOSFETs and can impart excellent OFF states to nanotube FETs under aggressive vertical scali…
We performed a comprehensive scaling study of Schottky barrier carbon nanotube transistors using self-consistent, atomistic scale simulations. We restrict our attention to Schottky barrier carbon nanotube FETs whose metal source/drain is attached to an intrinsic carbon nanotube channel. Ambipolar conduction is found to be an important factor that must be carefully considered in device design, especially when the gate oxide is thin. The channel length scaling limit imposed by source-drain tunneling is found to be between 5nm and 10nm, depending on the off-current specification. Using a large di…
This work evaluates the performance of carbon nanotube field effect transistors (CNTFET) using few layer graphene as the contact electrode material. We present the experimental results obtained on the barrier height at CNT graphene junction using temperature dependent IV measurements. The estimated barrier height in our devices for both holes and electrons is close to zero or slightly negative indicating the Ohmic contact of graphene with the valence and conduction bands of CNTs. In addition, we also report that there is no correlation between the barrier height and thickness of graphene.
High performance p- and n-type single-walled carbon nanotube (SWNT) field-effect transistors (FETs) are obtained by using high and low work function metals, Pd and Al as source/drain (S/D) electrodes respectively. Ohmic contacts made to chemically intrinsic SWNTs, with no or small Schottky barriers (SB), afford high ON-state currents up to 20 uA per tube. The lack of significant Fermi-level pinning at the nanotube-metal interfaces allows for fine-tuning of the barrier heights for p-and n-channel conductions by changing the contact metals. The air-stable p- and n-FETs thus obtained can be used …
Nanoscale semiconductor materials have been extensively investigated as the channel materials of transistors for energy-efficient low-power logic switches to enable scaling to smaller dimensions. On the opposite end of transistor applications is power electronics for which transistors capable of switching very high voltages are necessary. Miniaturization of energy-efficient power switches can enable the integration with various electronic systems and lead to substantial boosts in energy efficiency. Nanotechnology is yet to have an impact in this arena. In this work, it is demonstrated that nan…
We study field effect transistor characteristics in etched single layer MoS2 nanoribbon devices of width 50nm with ohmic contacts. We employ a SF6 dry plasma process to etch MoS2 nanoribbons using low etching (RF) power allowing very good control over etching rate. Transconductance measurements reveal a steep sub-threshold slope of 3.5V/dec using a global backgate. Moreover, we measure a high current density of 38 uA/um resulting in high on/off ratio of the order of 10^5. We observe mobility reaching as high as 50 cm^2/V.s with increasing source-drain bias.
In this letter, we report a three-dimensional (3D) quantum mechanical simulation to investigate the effects of surface roughness scattering (SRS) on the device characteristics of Si nanowire transistors (SNWTs). We treat the microscopic structure of the Si/SiO2 interface roughness directly by using a 3D finite element technique. The results show that 1) SRS reduces the electron density of states in the channel, which increases the SNWT threshold voltage, and 2) the SRS in SNWTs becomes more effective when more propagating modes are occupied, which implies that SRS is more important in planar m…
We report the operation of a field-effect transistor based on a single InAs nanowire gated by an ionic liquid. Liquid gating yields very efficient carrier modulation with a transconductance value thirty time larger than standard back gating with the SiO2 /Si++ substrate. Thanks to this wide modulation we show the controlled evolution from semiconductor to metallic-like behavior in the nanowire. This work provides the first systematic study of ionic-liquid gating in electronic devices based on individual III-V semiconductor nanowires: we argue this architecture opens the way to a wide range of …
Low-dimensional metallic transport is at the heart of modern high-performance transistors. While the best devices are currently based on III-V heterojunction quantum-well channels, we demonstrate that much greater performance gains reside in the unique properties of one-dimensional carbon nanotubes. Using recent experimental data, we show how the specific features of degenerate carrier kinetics in metallic nanotubes enable a novel class of quantum-confined signal detector whose current gain exceeds present transistor technology. We analyze the key interplay of degeneracy and scattering dynamic…
In this article, we present a configurable field-effect transistor (FET), where not only polarity (n- and p-type), but the conduction mechanism of a FET can also be configured dynamically. As a result, we can have both types of devices, high-performance MOSFET and low-power TFET, for computational and power efficient system on chip (SoC) products. The calibrated 3D-TCAD simulation results validate characteristics and functionalities of the configurable FET, and showed good consistency with the static conventional MOSFET (or TFET).
Semiconducting single-walled carbon nanotubes are studied in the diffusive transport regime. The peak mobility is found to scale with the square of the nanotube diameter and inversely with temperature. The maximum conductance, corrected for the contacts, is linear in the diameter and inverse temperature. These results are in good agreement with theoretical predictions for acoustic phonon scattering in combination with the unusual band structure of nanotubes. These measurements set the upper bound for the performance of nanotube transistors operating in the diffusive regime.
Sub-10nm wide graphene nanoribbon field-effect transistors (GNRFETs) are studied systematically. All sub-10nm GNRs afforded semiconducting FETs without exception, with Ion/Ioff ratio up to 10^6 and on-state current density as high as ~2000uA/um. We estimated carrier mobility ~200cm2/Vs and scattering mean free path ~10nm in sub-10nm GNRs. Scattering mechanisms by edges, acoustic phonon and defects are discussed. The sub-10nm GNRFETs are comparable to small diameter (d<=~1.2nm) carbon nanotube FETs with Pd contacts in on-state current density and Ion/Ioff ratio, but have the advantage of produc…
We have fabricated carbon nanotube (CN) field-effect transistors with multiple, individually addressable gate segments. The devices exhibit markedly different transistor characteristics when switched using gate segments controlling the device interior versus those near the source and drain. We ascribe this difference to a change from Schottky barrier modulation at the contacts to bulk switching. We also find that the current through the bulk portion is independent of gate length for any gate voltage, offering direct evidence for ballistic transport in semiconducting CNs over at least a few hun…
In this letter we discuss how the short channel behavior in sub 100 nm channel range can be improved by inducing a step surface potential profile at the back gate of an asymmetrical double gate (DG) Silicon-On-Insulator (SOI) Metal-Oxide-Semiconductor Field-Effect- Transistor (MOSFET) in which the front gate consists of two materials with different work functions.
A simple and highly reproducible single electron transistor (SET) has been fabricated using gated silicon nanowires. The structure is a metal-oxide-semiconductor field-effect transistor made on silicon-on-insulator thin films. The channel of the transistor is the Coulomb island at low temperature. Two silicon nitride spacers deposited on each side of the gate create a modulation of doping along the nanowire that creates tunnel barriers. Such barriers are fixed and controlled, like in metallic SETs. The period of the Coulomb oscillations is set by the gate capacitance of the transistor and ther…
Solution processed field-effect transistors based on single crystalline silicon nanowires (Si NWs) with metal Schottky contacts are demonstrated. The semiconducting layer was deposited from a nanowire ink formulation at room temperature. The devices with 230nm thick SiO2 gate insulating layers show excellent output current-voltage characteristics with early saturation voltages under 2 volts, constant saturation current and exceptionally low dependence of saturation voltage with the gate field. Operational principles of these devices are markedly different from traditional ohmic-contact field-e…
We present an analytical device model for a field-effect transistor based on a heterostructure which consists of an array of nanoribbons clad between the highly conducting substrate (the back gate) and the top gate controlling the source-drain current. The equations of the model of a graphene nanoribbon field-effect transistor (GNR-FET) include the Poisson equation in the weak nonlocality approximation. Using this model, we find explicit analytical formulas for the spatial distributions of the electric potential along the channel and for the GNR-FET current-voltage characteristics (the depende…
Ability to understand and model the performance limits of nanowire transistors is the key to design of next generation devices. Here, we report studies on high-mobility junction-less gate-all-around nanowire field effect transistor with carrier mobility reaching 2000 cm2/V.s at room temperature. Temperature-dependent transport measurements reveal activated transport at low temperatures due to surface donors, while at room temperature the transport shows a diffusive behavior. From the conductivity data, the extracted value of sound velocity in InAs nanowires is found to be an order less than th…
Electronic transport in a carbon nanotube (CNT) metal-oxide-semiconductor field effect transistor (MOSFET) is simulated using the non-equilibrium Green's functions method with the account of electron-phonon scattering. For MOSFETs, ambipolar conduction is explained via phonon-assisted band-to-band (Landau-Zener) tunneling. In comparison to the ballistic case, we show that the phonon scattering shifts the onset of ambipolar conduction to more positive gate voltage (thereby increasing the off current). It is found that the subthreshold swing in ambipolar conduction can be made as steep as 40mV/d…
We report on the fabrication and characterization of synthesized multiwall MoS2 nanotube (NT) and nanoribbon (NR) field-effect transistors (FETs). The MoS2 NTs and NRs were grown by chemical transport, using iodine as a transport agent. Raman spectroscopy confirms the material as unambiguously MoS2 in NT, NR, and flake forms. Transmission electron microscopy was used to observe cross sections of the devices after electrical measurements and these were used in the interpretation of the electrical measurements allowing estimation of the current density. The NT and NR FETs demonstrate n-type beha…
Bottom-up assembled nanomaterials and nanostructures allow for the studies of rich and unprecedented quantum-related and mesoscopic transport phenomena. However, it can be difficult to quantify the correlations between the geometrical or structural parameters obtained from advanced microscopy and measured electrical characteristics when they are made into macroscopic devices. Here, we propose a strategy to connect the nanomaterial morphologies and the device performance through a Monte Carlo device model and apply it to understand the scaling trends of bottom-up synthesized armchair graphene n…
Millivolt range thermovoltage is demonstrated in single InAs-nanowire based field effect transistors. Thanks to a buried heating scheme, we drive both a large thermal bias DT>10K and a strong field-effect modulation of electric conductance on the nanostructures. This allows the precise mapping of the evolution of the Seebeck coefficient S as a function of the gate-controlled conductivity between room temperature and 100K$. Based on these experimental data a novel estimate of the electron mobility is given. This value is compared with the result of standard field-effect based mobility estimates…
