The carrier mobility μof few-layer graphene (FLG) field-effect transistors increases ten-fold when the SiO_2 substrate is replaced by single-crystal epitaxial Pb(Zr_0.2Ti_0.8)O_3 (PZT). In the electron-only regime of the FLG, μreaches 7x10^4 cm^2/Vs at 300K for n = 2.4x10^12/cm^2, 70% of the intrinsic limit set by longitudinal acoustic (LA) phonons; it increases to 1.4x10^5 cm^2/Vs at low temperature. The temperature-dependent resistivity ρ(T) reveals a clear signature of LA phonon scattering, yielding a deformation potential D = 7.8+/-0.5 eV.
We have fabricated quantum dot single electron transistors, based on AlGaAs/GaAs heterojunctions without modulation doping, which exhibit clear and stable Coulomb blockade oscillations. The temperature dependence of the Coulomb blockade peak lineshape is well described by standard Coulomb blockade theory in the quantum regime. Bias spectroscopy measurements have allowed us to directly extract the charging energy, and showed clear evidence of excited state transport, confirming that individual quantum states in the dot can be resolved.
We report room-temperature Coulomb blockade in a single layer graphene three-terminal single-electron transistor (SET) fabricated using feedback-controlled electroburning. The small separation between the side gate electrode and the graphene quantum dot results in a gate coupling up to 3 times larger compared to the value found for the back gate electrode. This allows for an effective tuning between the conductive and Coulomb blocked state using a small side gate voltage of about 1V. The technique can potentially be used in the future to fabricate all-graphene based room temperature single-ele…
Supplementary Information to arXiv:0810.4466: 1. Characterizations of Pb(Zr_0.2Ti_0.8)O_3 (PZT) films. 2. Substrate preparation before the exfoliation of graphene. 3. The band structure of FLG. 4. Dielectric constant measurements of PZT. 5. rho(V_g) and R_H(V_g) fitting inside the band overlap regime. 6. The deformation potential of longitudinal acoustic (LA) phonons in graphene. 7. Resistivity and Hall measurements of a SiO_2-gated FLG.
In view of the appreciable semiconducting gap of 0.26 eV observed in recent experiments, epitaxial graphene on a SiC substrate seems a promising channel material for FETs. Indeed, it is two-dimensional - and therefore does not require prohibitive lithography - and exhibits a wider gap than other alternative options, such as bilayer graphene. Here we propose a model and assess the achievable performance of a nanoscale FET based on epitaxial graphene on SiC, conducting an exploration of the design parameter space. We show that the current can be modulated by 4 orders of magnitude; for digital ap…
The maximum oscillation frequency (fmax) quantifies the practical upper bound for useful circuit operation. We report here an fmax of 70 GHz in transistors using epitaxial graphene grown on the C-face of SiC. This is a significant improvement over Si-face epitaxial graphene used in the prior high frequency transistor studies, exemplifying the superior electronics potential of C-face epitaxial graphene. Careful transistor design using a high κ dielectric T-gate and self-aligned contacts, further contributed to the record-breaking fmax.
We report the realization of top-gated graphene nanoribbon field effect transistors (GNRFETs) of ~10 nm width on large-area epitaxial graphene exhibiting the opening of a band gap of ~0.14 eV. Contrary to prior observations of disordered transport and severe edge-roughness effects of GNRs, the experimental results presented here clearly show that the transport mechanism in carefully fabricated GNRFETs is conventional band-transport at room temperature, and inter-band tunneling at low temperature. The entire space of temperature, size, and geometry dependent transport properties and electrostat…
A new method to fabricate non-superconducting mesoscopic tunnel junctions by oxidation of Ti is presented. The fabrication process uses conventional electron beam lithography and shadow deposition through an organic resist mask. Superconductivity in Ti is suppressed by performing the deposition under a suitable background pressure. We demonstrate the method by making a single electron transistor which operated at $T < 0.4$ K and had a moderate charge noise of $2.5 \times 10^{-3}$ e/$\sqrt{\mathrm{Hz}}$ at 10 Hz. Based on nonlinearities in the current-voltage characteristics at higher voltages,…
A single-electron transistor has been realized in a Ga[Al]As heterostructure by oxidizing lines in the GaAs cap layer with an atomic force microscope. The oxide lines define the boundaries of the quantum dot, the in-plane gate electrodes, and the contacts of the dot to source and drain. Both the number of electrons in the dot as well as its coupling to the leads can be tuned with an additional, homogeneous top gate electrode. Pronounced Coulomb blockade oscillations are observed as a function of voltages applied to different gates. We find that, for positive top-gate voltages, the lithographic…
We report on room temperature THz detection by means of antenna-coupled field effect transistors fabricated by using epitaxial graphene grown on silicon carbide substrate. Two independent detection mechanisms are found: plasma wave assisted-detection and thermoelectric effect, which is ascribed to the presence of junctions along the FET channel. The superposition of the calculated functional dependence of both the plasmonic and thermoelectric photovoltages on the gate bias qualitatively well reproduces the measured photovoltages. Additionally, the sign reversal of the measured photovoltage dem…
We report on fabrication of single-electron transistors using InAs nanowires with epitaxial aluminium with fixed tunnel barriers made of aluminium oxide. The devices exhibit a hard superconducting gap induced by the proximized aluminium cover shell and they behave as metallic single-electron transistors. In contrast to the typical few channel contacts in semiconducting devices, our approach forms opaque multichannel contacts to a semiconducting wire and thus provides a complementary way to study them. In addition, we confirm that unwanted extra quantum dots can appear at the surface of the nan…
We demonstrate non-volatile, n-type, back-gated, MoS$_{2}$ transistors, placed directly on an epitaxial grown, single crystalline, PbZr$_{0.2}$Ti$_{0.8}$O$_{3}$ (PZT) ferroelectric. The transistors show decent ON current (19 $μA/μ$m), high on-off ratio (10$^{7}$), and a subthreshold swing of (SS ~ 92 mV/dec) with a 100 nm thick PZT layer as the back gate oxide. Importantly, the ferroelectric polarization can directly control the channel charge, showing a clear anti-clockwise hysteresis. We have selfconsistently confirmed the switching of the ferroelectric and corresponding change in channel cu…
We have fabricated and measured ballistic graphene transistors with two oblique gates that can be independently biased. The gate lengths are about 38 nm and are separated by a distance of 30 nm, the tilting angle being of 45o with respect to source and drain electrodes distanced at 190 nm. Electric measurements reveal specific properties of ballistic carrier transport, i.e. nonlinear drain voltage-drain current dependence, showing a saturation region, and negative differential resistance at certain bias voltages, which cannot be explained without physical mechanisms related to ballistic transp…
We report about the fabrication and analysis of the properties of Cr/CrO_x/Cr tunnel junctions and SET transistors, prepared by different variants of direct-writing multilayer technique. In all cases, the CrO_x tunnel barriers were formed in air under ambient conditions. From the experiments on single junctions, values for the effective barrier height and thickness were derived. For the Cr/CrO_x/Cr SET transistors we achieved minimal junction areas of 17 x 60 nm^2 using a scanning transmission electron microscope for the e-beam exposure on Si_3N_4 membrane substrate. We discuss the electrical …
The possible existence of short-channel effects in oxide field-effect transistors is investigated by exploring field-effect transistors with various gate lengths fabricated from LaAlO$_3$-SrTiO$_3$ heterostructures. The studies reveal the existence of channel-length modulation and drain-induced barrier lowering for gate lengths below 1 μm, with a characteristic behavior comparable to semiconducting devices. With the fabrication of field-effect transistors with gate lengths as small as 60 nm the results demonstrate the possibility to fabricate by electron-beam lithography functional devices bas…
A novel graphene transistor architecture is reported. The transistor has a U-shape geometry and was fabricated using a gallium focused ion beam (FIB). The channel conductance was tuned with a back gate. The Ion/Ioff ratio exceeded 10^5.
Quantum Hall effect (QHE) devices based on epitaxial graphene films grown on SiC were fabricated and studied for development of the QHE resistance standard. The graphene-metal contacting area in the Hall devices has been improved and fabricated using a double metalization process. The tested devices had an initial carrier concentration of (0.6 - 10)*10^11 1/cm^2 and showed half-integer quantum Hall effect at a relatively low (3 T) magnetic field. Application of the photochemical gating method and annealing of the sample provides a convenient way for tuning the carrier density to the optimum va…
We have fabricated n-layer graphene field effect transistors on epitaxial ferroelectric Pb(Zr_0.2Ti_0.8)O_3 (PZT) thin films. At low gate voltages, PZT behaves as a high-k dielectric with k up to 100. An unusual resistance hysteresis occurs in gate sweeps at high voltages, with its direction opposite to that expected from the polarization switching of PZT. The relaxation of the metastable state is thermally activated, with an activation barrier of 50-110 meV and a time constant of 6 hours at 300 K. We attribute its origin to the slow dissociation/recombination dynamics of water molecules adsor…
We present the first study of the intrinsic electrical properties of WS$_2$ transistors fabricated with two different dielectric environments WS$_2$ on SiO$_2$ and WS$_2$ on h-BN/SiO$_2$, respectively. A comparative analysis of the electrical characteristics of multiple transistors fabricated from natural and synthetic WS$_2$ with various thicknesses from single- up to four-layers and over a wide temperature range from 300K down to 4.2 K shows that disorder intrinsic to WS$_2$ is currently the limiting factor of the electrical properties of this material. These results shed light on the role p…
Magnetotransport measurements on Hall bar devices fabricated on purely monolayer epitaxial graphene on Silicon Carbide (SiC/G) show a very tight spread in carrier concentration and mobility across wafer- size dimensions. In contrast, SiC/G devices containing bilayer graphene domains display variations in their electronic properties linked to the amount of bilayer content.
Liquid-based applications of biomolecule-decorated field-effect transistors (FETs) range from biosensors to in vivo implants. A critical scientific challenge is to develop a quantitative understanding of the gating effect of charged biomolecules in ionic solution and how this influences the readout of the FETs. To address this issue, we fabricated protein-decorated graphene FETs and measured their electrical properties, specifically the shift in Dirac voltage, in solutions of varying ionic strength. We found excellent quantitative agreement with a model that accounts for both the graphene pola…
In this work, an evaluation of the contact quality of black phosphorus (BP) field-effect transistors (FETs) from different technologies previously reported is performed by means of an efficient and reliable contact resistance extraction methodology based on individual device practical characteristics. A good agreement is achieved between the extracted values with the Y-function method used here and reference values obtained with other methods considering internal values as well as with more expensive methods involving fabricated test structures. The method enables a direct evaluation of differ…
In order to continue to improve integrated circuit performance and functionality, scaled transistors with short channel lengths and low thickness are needed. But the further scaling of silicon-based devices and the development of alternative semiconductor channel materials that are compatible with current fabrication processes is challenging. Here we report atomic-layer-deposited indium oxide transistors with channel lengths down to 8 nm, channel thicknesses down to 0.5 nm and equivalent dielectric oxide thickness down to 0.84 nm. Due to the scaled device dimensions and low contact resistance,…
Low temperature electron transport measurements of single electron transistors fabricated in advanced CMOS technology with polysilicon gates not only exhibit clear Coulomb blockade behavior but also show a large number of additional conductance fluctuations in the nonlinear regime. By comparison with simulations these features are quantitatively attributed to the effects of discretely charged islands in the polysilicon gates.
We have fabricated and characterized a single hole transistor in an undoped AlGaAs-GaAs heterostructure. Our device consists of a p-type quantum dot, populated using an electric field rather than modulation doping. Low temperature transport measurements reveal periodic conductance oscillations due to Coulomb blockade. We find that the low frequency charge noise is comparable to that in modulation-doped GaAs single electron transistors (SETs), and almost an order of magnitude better than in silicon SETs.
Graphene field-effect transistors are fabricated utilizing single-crystal hexagonal boron nitride (h-BN), an insulating isomorph of graphene, as the gate dielectric. The devices exhibit mobility values exceeding 10,000 cm2/V-sec and current saturation down to 500 nm channel lengths with intrinsic transconductance values above 400 mS/mm. The work demonstrates the favorable properties of using h-BN as a gate dielectric for graphene FETs.
We have investigated the low frequency (f) flicker (also called 1/f) noise of single-layer graphene devices on h-BN (placed on SiO2/Si) along with those on SiO2/Si. We observe that the devices fabricated on h-BN have on average one order of magnitude lower noise amplitude compared with devices fabricated on SiO2/Si. We associate this noise reduction to the lower densities of impurities and trap sites in h-BN than in SiO2. Furthermore, the gate voltage dependent noise amplitude shows a broad maximum at Dirac point for devices on h-BN, in contrast to the M-shaped behavior showing a minimum at Di…
Recent experiments shown that graphene epitaxially grown on Silicon Carbide (SiC) can exhibit a energy gap of 0.26 eV, making it a promising material for electronics. With an accurate model, we explore the design parameter space for a fully ballistic graphene-on-SiC Tunnel Field-Effect Transistors (TFETs), and assess the DC and high frequency figures of merit. The steep subthreshold behavior can enable I_{ON}/I_{OFF} ratios exceeding 10^4 even with a low supply voltage of 0.15 V, for devices with gatelength down to 30 nm. Intrinsic transistor delays smaller than 1 ps are obtained. These factor…
A dual mode device behaving either as a field-effect transistor or a single electron transistor (SET) has been fabricated using silicon-on-insulator metal oxide semiconductor technology. Depending on the back gate polarisation, an electron island is accumulated under the front gate of the device (SET regime), or a field-effect transistor is obtained by pinching off a bottom channel with a negative front gate voltage. The gradual transition between these two cases is observed. This dual function uses both vertical and horizontal tunable potential gradients in non-overlapped silicon-on-insulator…
We have fabricated and examined several Al single electron transistors whose small islands were positioned on top of a counter electrode and hence did not come into contact with a dielectric substrate. The equivalent charge noise figure of all transistors turned out to be surprisingly low, (2.5 - 7)*10E-5 e/sqrt(Hz) at f = 10 Hz. Although the lowest detected noise originates mostly from fluctuations of background charge, the noise contribution of the tunnel junction conductances was, on occasion, found to be dominant.
We determine conditions for the formation of compressible stripes near the quantum Hall effect (QHE) edges of top-gated epitaxial graphene on Si-terminated SiC (G/SiC) and compare those to graphene exfoliated onto insulating substrate in the field-effect-transistor (GraFET) geometry. For G/SiC, a large density of localised surface states on SiC just underneath graphene layer and charge transfer between them lead both to doping of graphene and to screening of potential profile near its edge. This suppresses formation of compressible stripes near QHE edges in graphene, making them much narrower …
Single electron transistors (SETs) are fabricated by placing single walled carbon nanotubes (SWNTs) on a 100 nm wide local Al/Al2O3 bottom gate and then contacting with Pd electrodes. Coulomb oscillations up to 125 K were observed and charging energies of 12-15 meV with level spacing of ~5 meV were measured from the Couloumb diamond, in agreement with a dot size of ~100 nm, implying that the local gate defines the dot size by bending SWNT at the edges and controls its operation. This "mechanical template" approach may facilitate large scale fabrication of SET devices using SWNT.
We have fabricated aluminum single-electron transistors in which the island is not in contact with the substrate. This new type of device, which can be called suspended single-electron transistor (SUSET), displayed well-defined I-V and dI/dV-V features typical for high-quality standard SET's.
Gate-controlled supercurrent (GCS) in superconductor nanobridges has recently attracted attention as a means to create superconducting field effect transistors. Despite the clear advantage for applications with low power consumption and high switching speeds, the microscopic mechanism of the field effect is still under debate. In this work, we realize GCS for the first time in an epitaxial superconductor, which is created as a shell on an InAs nanowire. We show that the supercurrent in the epitaxial Al layer can be switched to the normal state by applying $\simeq\pm$ 23$\,$V on a bottom gate i…
Carbon nanotube field-effect transistors (FETs) with passivated coaxial gate structures have been fabricated after growth of contacted suspended single wall nanotubes (SWNTs) and subsequent coating with gate dielectrics. Electron Fabry-Perot interferences are observed in the FETs indicating ballistic transport in the coated structures. Reliable production of high-performance SWNT FETs has been obtained by combining patterned growth of SWNT arrays with feed-back controlled electrical breakdown to select desired semiconducting SWNTs, making large-scale SWNT FET fabrication achievable. P-type and…
We report on the experimental demonstration and electrical characterization of N = 7 armchair graphene nanoribbon (7-AGNR) field effect transistors. The back-gated transistors are fabricated from atomically precise and highly aligned 7-AGNRs, synthesized with a bottom-up approach. The large area transfer process holds the promise of scalable device fabrication with atomically precise nanoribbons. The channels of the FETs are approximately 30 times longer than the average nanoribbon length of 30 nm to 40 nm. The density of the GNRs is high, so that transport can be assumed well-above the percol…
The operation of a digital logic inverter consisting of one p- and one n-type graphene transistor integrated on the same sheet of monolayer graphene is demonstrated. The type of one of the transistors was inverted by moving its Dirac point to lower gate voltages via selective electrical annealing. Boolean inversion is obtained by operating the transistors between their Dirac points. The fabricated inverter represents an important step towards the development of digital integrated circuits on graphene.
In this work, we present a performance analysis of Field Effect Transistors based on recently fabricated 100% hydrogenated graphene (the so-called graphane) and theoretically predicted semi-hydrogenated graphene (i.e. graphone). The approach is based on accurate calculations of the energy bands by means of GW approximation, subsequently fitted with a three-nearest neighbor (3NN) sp3 tight-binding Hamiltonian, and finally used to compute ballistic transport in transistors based on functionalized graphene. Due to the large energy gap, the proposed devices have many of the advantages provided by …
Single-walled carbon nanotubes (SWNTs) have been grown via chemical vapor deposition on high-kappa dielectric SrTiO3/Si substrates, and high-performance semiconducting SWNT field-effect transistors have been fabricated using the thin SrTiO3 as gate dielectric and Si as gate electrode. The transconductance per channel width is 8900 S/m. The high transconductance cannot be explained by the increased gate capacitance; it is proposed that the increased electric field at the nanotube-electrode interface due to the high-kappa SrTiO3 decreases or eliminates the nanotube-electrode Schottky barrier.
Top-gated, few-layer graphene field-effect transistors (FETs) fabricated on thermally-decomposed semi-insulating 4H-SiC substrates are demonstrated. Physical vapor deposited SiO2 is used as the gate dielectric. A two-dimensional hexagonal arrangement of carbon atoms with the correct lattice vectors, observed by high-resolution scanning tunneling microscopy, confirms the formation of multiple graphene layers on top of the SiC substrates. The observation of n-type and p-type transition further verifies Dirac Fermions unique transport properties in graphene layers. The measured electron and hole …
Tens of graphene transistors with nanoperforated channels and different channel lengths were fabricated at the wafer scale. The nanoholes have a central diameter of 20 nm and a period of 100 nm, the lengths of the channel being of 1, 2, 4 or 8 micrometers. We have found that the mobility in these 2 micrometer-wide transistors varies from about 10400 cm2/Vs for a channel length of 1 micrometer to about 550 cm2/Vs for a channel length of 8 micrometer. Irrespective of the mobility value, in all transistors the on-off ratio is in the range 10^3-10^4 at drain and gate voltages less than 2 V. The ch…
Ferromagnetic single electron transistors with Al islands and orthogonal ferromagnetic leads (Co) are fabricated using ebeam lithography followed by shadow evaporation techniques. I-V characteristics exhibit typical single electron tunneling effects. Transport measurements performed in external magnetic field show that, when the two ferromagnetic leads are in antiparallel configuration, spin imbalance leads to a suppression of superconductivity.
We demonstrate the realization of an electrically-driven integrated source of surface plasmon polaritons. Light-emitting individual single-walled carbon nanotube field effect transistors were fabricated in a plasmonic-ready platform. The devices were operated at ambient condition to act as an electroluminescence source localized near the contacting gold electrodes. We show that photon emission from the semiconducting channel can couple to propagating surface plasmons developing in the electrical terminals. Momentum-space spectroscopy suggests that excited plasmon modes are bound to the metal-g…
Using calibrated simulations, we report a detailed study of the doping-less tunnel field effect transistor (TFET) on a thin intrinsic silicon film using charge plasma concept. Without the need for any doping, the source and drain regions are formed using the charge plasma concept by choosing appropriate work functions for the source and drain metal electrodes. Our results show that the performance of the doping-less TFET is similar to that of a corresponding doped TFET. The doping-less TFET is expected to be free from problems associated with random dopant fluctuations. Further, fabrication of…
The transparent interface in epitaxial Al-InAs heterostructures provides an excellent platform for potential advances in mesoscopic and topological superconductivity. Semiconductor-based Josephson Junction Field Effect Transistors (JJ-FETs) fabricated on these heterostructures have a metallic gate that tunes the supercurrent. Here we report the fabrication and measurement of gate-tunable Al-InAs JJ-FETs in which the gate dielectric in contact with the InAs is produced by mechanically exfoliated hexagonal boron nitride (h-BN) followed by dry transfer using a van der Waals-mediated pick up proce…
We have fabricated transistor structures using fluorinated single-layer graphene flakes and studied their electronic properties at different temperatures. Compared with pristine graphene, fluorinated graphene has very large and strongly temperature dependent resistance in the electro-neutrality region. We show that fluorination creates a mobility gap in graphene's spectrum where electron transport takes place via localised electron states.
A single electron transistor based on Al-AlO_x-Nb tunnel junctions was fabricated by shadow evaporation and in situ barrier formation. Its output current noise was measured, using a transimpedance amplifier setup, as a function of bias voltage, gain, and temperature, in the frequency range 1...300 Hz. The spot noise at 10 Hz is dominated by a gain dependent component, indicating that the main noise contribution comes from fluctuations at the input of the transistor. Deviations from ideal input charge noise behaviour are found in the form of a bias dependence of the differential charge equivale…
We present the results of the experimental investigation of the low - frequency noise in bilayer graphene transistors. The back - gated devices were fabricated using the electron beam lithography and evaporation. The charge neutrality point for the fabricated transistors was around 10 V. The noise spectra at frequencies above 10 - 100 Hz were of the 1/f - type with the spectral density on the order of 10E-23 - 10E-22 A2/Hz at the frequency of 1 kHz. The deviation from the 1/f spectrum at the frequencies below 10 -100 Hz indicates that the noise is of the carrier - number fluctuation origin due…
We present results of non-local and three terminal (3T) spin precession measurements on spin injection devices fabricated on epitaxial graphene on SiC. The measurements were performed before and after an annealing step at 150 degrees Celsius for 15 minutes in vacuum. The values of spin relaxation length L_s and spin relaxation time tau_s obtained after annealing are reduced by a factor 2 and 4, respectively, compared to those before annealing. An apparent discrepancy between spin diffusion constant D_s and charge diffusion constant D_c can be resolved by investigating the temperature dependenc…
Negative differential resistance (NDR) with room temperature peak-valley-ratio of 8 has been observed in a ballistic field-effect-transistor (FET) based on graphene, having an oblique top gate. Graphene FETs with a top gate inclination angle of 45 degrees and a drain-source distance of 400 nm were fabricated on a chip cut from a 4 inch graphene wafer grown by CVD. From the 60 measured devices, NDR was observed only in the regions where the CVD graphene displays the Raman signature of defectless monolayers. In other specific positions on the wafer, where graphene quality was not high enough and…
We have fabricated suspended few layer (1-3 layers) graphene nanoribbon field effect transistors from unzipped multiwall carbon nanotubes. Electrical transport measurements show that current-annealing effectively removes the impurities on the suspended graphene nanoribbons, uncovering the intrinsic ambipolar transfer characteristic of graphene. Further increasing the annealing current creates a narrow constriction in the ribbon, leading to the formation of a large band-gap and subsequent high on/off ratio (which can exceed 104). Such fabricated devices are thermally and mechanically stable: re…
This letter reports the impact of surface morphology on the carrier transport and RF performance of graphene FETs formed on epitaxial graphene films synthesized on SiC substrates. Such graphene exhibits long terrace structures with widths between 3-5 μm and steps of 10\pm2 nm in height. While a carrier mobility above 3000 cm2/Vs at a carrier density of 1e12 cm-2 is obtained in a single graphene terrace domain at room temperature, the step edges can result in a vicinal step resistance of ~21 kΩ.μm. By orienting the transistor layout so that the entire channel lies within a single graphene terra…
The interaction between intersubband resonances (ISRs) and metamaterial microcavities can form a strongly coupled system where new resonances form that depend on the coupling strength. Here we present experimental evidence of strong coupling between the cavity resonance of a THz metamaterial and the ISR in a high electron mobility transistor structure with a triangular confinement. The device is electrically switched from an uncoupled to a strongly coupled regime by tuning the ISR with epitaxially grown transparent gates. An asymmetric triangular potential in the heterostructure enables ultraw…
A recently published report in the journal Science claims that the Datta-Das Spin Field Effect Transistor has been demonstrated because an exact agreement was found between the voltage modulation in a fabricated structure and a theoretical equation that supposedly describes the voltage modulation of the Datta-Das Transistor. Here, I show that the said theoretical equation holds only for a one-dimensional transistor, or perhaps a quasi one-dimensional transistor, and is certainly not applicable to the two-dimensional transistor studied. Hence, the exact agreement is meaningless and does not sub…
We fabricated a non-local spin valve device with Co-MgO injector/detector tunnel contacts on a graphene spin channel. In this device, the spin polarization of the injector contact can be tuned by both the injector current bias and the gate voltage. The spin polarization can be turned off and even inverted. This behavior enables a spin transistor where the signal is switched off by turning off the spin injection using the field-effect. We propose a model based on a gate-dependent shift of the minimum in the graphene density of states with respect to the tunneling density of states of cobalt, wh…
Ballistic quantum transport calculations based on the non-equilbrium Green's function formalism show that field-effect transistor devices made from chevron-type graphene nanoribbons (CGNRs) could exhibit negative differential resistance with peak-to-valley ratios in excess of 4800 at room temperature as well as steep-slope switching with 6 mV/decade subtheshold swing over five orders of magnitude and ON-currents of 88$μ$A/$μ$m. This is enabled by the superlattice-like structure of these ribbons that have large periodic unit cells with regions of different effective bandgap, resulting in miniba…
We demonstrate that the carrier concentration of epitaxial graphene devices grown on the C-face of a SiC substrate is efficiently modulated by a buried gate. The gate is fabricated via the implantation of nitrogen atoms in the SiC crystal, 200 nm below the surface, and works well at intermediate temperatures: 40K-80K. The Dirac point is observed at moderate gate voltages (1-20V) depending upon the surface preparation. For temperatures below 40K, the gate is inefficient as the buried channel is frozen out. However, the carrier concentration in graphene remains very close to the value set at T\s…
We have fabricated single-Cooper-pair transistors in which the spatial profile of the superconducting gap energy was controlled by oxygen doping. The profile dramatically affects the switching current \textit{vs.} gate voltage curve of the transistor, changing its period from $1e$ to $2e$. A model based on nonequilibrium quasiparticles in the leads explains our results, including the surprising observation that even devices with a clean $2e$ period are ``poisoned'' by small numbers of these quasiparticles.
Diamond field-effect transistors (FETs) have potential applications in power electronics and high-output high-frequency amplifications. In such applications, high charge-carrier mobility is desirable for a reduced loss and high-speed operation. We have recently fabricated diamond FETs with a hexagonal-boron-nitride gate dielectric and observed a high mobility above 300 cm$^{2}$V$^{-1}$s$^{-1}$. In this study, we examine which scattering mechanism limits the mobility of our FETs through theoretical calculations. Our calculations reveal that the dominant carrier scattering is caused by surface c…
In this letter, we demonstrate the first BN/Graphene/BN field effect transistor for RF applications. The BN/Graphene/BN structure can preserve the high mobility of graphene, even when it is sandwiched between a substrate and a gate dielectric. Field effect transistors (FETs) using a bilayer graphene channel have been fabricated with a gate length LG=450 nm. A current density in excess of 1 A/mm and DC transconductance close to 250 mS/mm are achieved for both electron and hole conductions. RF characterization is performed for the first time on this device structure, giving a current-gain cut-of…
