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arXiv 2009.01982quant-phcs.ARcs.ET
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虚拟化逻辑量子比特:一种用于纠错量子计算的2.5维体系结构

Virtualized Logical Qubits: A 2.5D Architecture for Error-Corrected Quantum Computing

Casey Duckering, Jonathan M. Baker, David I. Schuster, Frederic T. Chong

摘要:

目前,近期的量子设备近年来取得了巨大进展,最终证明了量子霸权。然而,从中期来看,量子机器将需要通过纠错过渡到更高的可靠性,可能是通过有前途的技术,如表面码,这些技术非常适合于量子比特连接有限的近期设备。我们发现量子存储器,特别是具有以2.5D架构排列的transmon量子位的谐振腔,可以有效地实现表面码,具有大量的硬件节省和性能/保真度增益。具体来说,我们 * 虚拟化逻辑量子比特 *,方法是将它们存储在分布在连接到每个transmon的量子比特存储器中的层中。令人惊讶的是,将每个逻辑量子比特分布在许多存储器上对容错性的影响最小,并且导致实质上更有效的操作。我们的设计允许共享相同物理地址的逻辑量子比特之间的快速横向CNOT操作,其速度比晶格手术hocTs快6倍。我们开发了一种新的嵌入,它节省了约10倍的transmons与另一个2x从一个额外的优化紧凑。虽然虚拟化逻辑量子比特(VLQ)在串行化方面付出了10倍的代价,但横向CNOT和面积效率方面的优势导致了与2D仅传输架构相当的性能。我们的模拟显示,容错能力与2D架构相当,同时节省了大量的硬件。此外,对于固定数量的transmon量子位,VLQ可以以1.22倍的速度产生魔态。这是未来容错量子计算机的关键基准。VLQ大大降低了容错的硬件要求,并实现了大约10个逻辑量子比特的概念验证实验演示,总共只需要11个transmons和9个附加腔。

英文摘要:

Current, near-term quantum devices have shown great progress in recent years culminating with a demonstration of quantum supremacy. In the medium-term, however, quantum machines will need to transition to greater reliability through error correction, likely through promising techniques such as surface codes which are well suited for near-term devices with limited qubit connectivity. We discover quantum memory, particularly resonant cavities with transmon qubits arranged in a 2.5D architecture, can efficiently implement surface codes with substantial hardware savings and performance/fidelity gains. Specifically, we *virtualize logical qubits* by storing them in layers distributed across qubit memories connected to each transmon. Surprisingly, distributing each logical qubit across many memories has a minimal impact on fault tolerance and results in substantially more efficient operations. Our design permits fast transversal CNOT operations between logical qubits sharing the same physical address which are 6x faster than lattice surgery CNOTs. We develop a novel embedding which saves ~10x in transmons with another 2x from an additional optimization for compactness. Although Virtualized Logical Qubits (VLQ) pays a 10x penalty in serialization, advantages in the transversal CNOT and area efficiency result in performance comparable to 2D transmon-only architectures. Our simulations show fault tolerance comparable to 2D architectures while saving substantial hardware. Furthermore, VLQ can produce magic states 1.22x faster for a fixed number of transmon qubits. This is a critical benchmark for future fault-tolerant quantum computers. VLQ substantially reduces the hardware requirements for fault tolerance and puts within reach a proof-of-concept experimental demonstration of around 10 logical qubits, requiring only 11 transmons and 9 attached cavities in total.

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