发表机构
Universitat Politècnica de Catalunya; Equal1 Labs; Universitat Politècnica de València（加泰罗尼亚理工大学; Equal1实验室; 瓦伦西亚理工大学）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
本研究提出多量子比特自旋量子比特穿梭总线架构，优化布局与辅助量子比特共享方案，结合Quantum Reverse Mapping方法，实现容错量子计算的层间协同设计，验证了自旋量子比特穿梭架构的可行性。
AI 中文摘要
容错量子计算不仅需要可靠的逻辑量子比特存储，还需要在纠错量子比特间执行高保真度逻辑操作的规模化能力。现有文献多聚焦于单个逻辑量子比特的症候提取优化，而支持鲁棒纠错与高效逻辑计算的物理架构协同设计仍是开放挑战。本研究提出一种多量子比特自旋量子比特穿梭总线架构，同时满足上述两项需求。该架构针对症候提取优化物理量子比特布局，支持任意数量逻辑量子比特间的横向两量子比特逻辑门，通过相干自旋穿梭实现全对全逻辑连通性。我们进一步提出一种辅助量子比特共享方案，在单个逻辑单元内编码多个逻辑量子比特，压缩处理器的物理占用面积并提升远程门保真度。将架构从一维总线扩展为二维穿梭轨道网格，可缩短量子比特间距离，实现逻辑误差的持续改善。最后，我们在逻辑层面应用Quantum Reverse Mapping方法优化15-to-1魔法态蒸馏电路的布局，展示所提架构的横向能力如何可被用于通用容错量子计算。综上，这些成果建立了连接量子堆栈物理层、纠错层与逻辑计算层的原则性协同设计框架，并证明自旋量子比特穿梭架构是可扩展容错量子计算的可行且灵活的基础。
英文摘要
Fault-tolerant quantum computing requires not only reliable logical qubit storage, but also the ability to perform high-fidelity logical operations between error-corrected qubits at scale. While much of the existing literature focuses on optimizing syndrome extraction for a single logical qubit, the co-design of physical architectures that support both robust error correction and efficient logical computation remains an open challenge. In this work, we propose a multi-qubit spin-qubit shuttling bus architecture that addresses both requirements simultaneously. The architecture optimizes the physical qubit layout for syndrome extraction and supports transversal two-qubit logical gates between an arbitrary number of logical qubits, achieving all-to-all logical connectivity through coherent spin shuttling. We further propose an ancilla-sharing scheme that encodes multiple logical qubits within a single logical element, compressing the physical footprint of the processor and improving long-range gate fidelity. Extending the architecture from a one-dimensional bus to a two-dimensional grid of shuttling tracks reduces the inter-qubit distance, yielding consistent improvements in logical error. Finally, we apply the Quantum Reverse Mapping methodology at the logical level to optimize the layout of a \textit{15-to-1} magic state distillation circuit, demonstrating how the transversal capabilities of the proposed architecture can be leveraged for universal fault-tolerant computation. Taken together, these results establish a principled co-design framework that bridges the physical, error-correction, and logical computation layers of the quantum stack, and demonstrate that spin-qubit shuttling architectures are a viable and flexible substrate for scalable fault-tolerant quantum computation.
