Synthesis and Optimization of Reversible Circuits for Homogeneous Boolean Functions

Boolean Functions, Quantum Gates, Hamilton Operators, Spin Systems and Computer Algebra

We describe the construction of quantum gates (unitary operators) from boolean functions and give a number of applications. Both non-reversible and reversible boolean functions are considered. The construction of the Hamilton operator for a quantum gate is also described with the Hamilton operator expressed as spin system. Computer algebra implementations are provided.

A Novel Synthesis Algorithm for Reversible Circuits

In this paper, a new non-search based synthesis algorithm for reversible circuits is proposed. Compared with the widely used search-based methods, our algorithm is guarantied to produce a result and can lead to a solution with much fewer steps. To evaluate the proposed method, several circuits taken from the literature are used. The experimental results corroborate the expected findings.

Techniques for the Synthesis of Reversible Toffoli Networks

This paper presents novel techniques for the synthesis of reversible networks of Toffoli gates, as well as improvements to previous methods. Gate count and technology oriented cost metrics are used. Our synthesis techniques are independent of the cost metrics. Two new iterative synthesis procedure employing Reed-Muller spectra are introduced and shown to complement earlier synthesis approaches. The template simplification suggested in earlier work is enhanced through introduction of a faster and more efficient template application algorithm, updated (shorter) classification of the templates, a…

One Additional Qubit is Enough: Encoded Embeddings for Boolean Components in Quantum Circuits

Research on quantum computing has recently gained significant momentum since first physical devices became available. Many quantum algorithms make use of so-called oracles that implement Boolean functions and are queried with highly superposed input states in order to evaluate the implemented Boolean function for many different input patterns in parallel. To simplify or enable a realization of these oracles in quantum logic in the first place, the Boolean reversible functions to be realized usually need to be broken down into several non-reversible sub-functions. However, since quantum logic i…

Synthesis of Reversible Functions Beyond Gate Count and Quantum Cost

Many synthesis approaches for reversible and quantum logic have been proposed so far. However, most of them generate circuits with respect to simple metrics, i.e. gate count or quantum cost. On the other hand, to physically realize reversible and quantum hardware, additional constraints exist. In this paper, we describe cost metrics beyond gate count and quantum cost that should be considered while synthesizing reversible and quantum logic for the respective target technologies. We show that the evaluation of a synthesis approach may differ if additional costs are applied. In addition, a new c…

Structured decomposition for reversible Boolean functions

Reversible Boolean function is a one-to-one function which maps $n$-bit input to $n$-bit output. Reversible logic synthesis has been widely studied due to its relationship with low-energy computation as well as quantum computation. In this work, we give a structured decomposition for even reversible Boolean functions (RBF). Specifically, for $n\geq 6$, any even $n$-bit RBF can be decomposed to $7$ blocks of $(n-1)$-bit RBF, where $7$ is a constant independent of $n$; and the positions of those blocks have large degree of freedom. Moreover, if the $(n-1)$-bit RBFs are required to be even as wel…

Reversible Logic Circuit Synthesis

Reversible or information-lossless circuits have applications in digital signal processing, communication, computer graphics and cryptography. They are also a fundamental requirement in the emerging field of quantum computation. We investigate the synthesis of reversible circuits that employ a minimum number of gates and contain no redundant input-output line-pairs (temporary storage channels). We prove constructively that every even permutation can be implemented without temporary storage using NOT, CNOT and TOFFOLI gates. We describe an algorithm for the synthesis of optimal circuits and stu…

可逆电路的渐近最优综合

Asymptotically optimal synthesis of reversible circuits

本文提出一种算法，使用不超过O(2^n n/log n)个基本门实现任意n线可逆电路，证明了其匹配2003年提出的下界，从而解决了可逆电路综合渐近最优性的开放问题。

Comparison of the Cost Metrics for Reversible and Quantum Logic Synthesis

A breadth-first search method for determining optimal 3-line circuits composed of quantum NOT, CNOT, controlled-V and controlled-V+ (NCV) gates is introduced. Results are presented for simple gate count and for technology motivated cost metrics. The optimal NCV circuits are also compared to NCV circuits derived from optimal NOT, CNOT and Toffoli (NCT) gate circuits. The work presented here provides basic results and motivation for continued study of the direct synthesis of NCV circuits, and establishes relations between function realizations in different circuit cost metrics.

Automated Method for Building CNOT Based Quantum Circuits for Boolean Functions

In this paper we discuss an efficient technique that can implement any given Boolean function as a quantum circuit. The method converts a truth table of a Boolean function to the corresponding quantum circuit using a minimal number of auxiliary qubits. We give examples of some circuits synthesized with this technique. A direct result that follows from the technique is a new way to convert any classical digital circuit to its classical reversible form.

Efficient Synthesis of Linear Reversible Circuits

In this paper we consider circuit synthesis for n-wire linear reversible circuits using the C-NOT gate library. These circuits are an important class of reversible circuits with applications to quantum computation. Previous algorithms, based on Gaussian elimination and LU-decomposition, yield circuits with O(n^2) gates in the worst-case. However, an information theoretic bound suggests that it may be possible to reduce this to as few as O(n^2/log n) gates. We present an algorithm that is optimal up to a multiplicative constant, as well as Theta(log n) times faster than previous methods. While …

利用平行多面体空间结构的小规模布尔函数面向CNOT综合

CNOT Oriented Synthesis for Small-Scale Boolean Functions Using Spatial Structures of Parallelotopes

针对NISQ时代量子电路综合受限于门保真度与比特数的问题，提出基于平行多面体空间结构的SSHR小规模布尔函数综合方法及两种变体，显著降低CNOT门数量。

A Single Universal n-bit Gate for Reversible Circuit Synthesis

Many universal reversible libraries that contain more than one gate type have been proposed in the literature. Practical implementation of reversible circuits is much easier if a single gate type is used in the circuit construction. This paper proposes a reversible n-bit gate that is universal for reversible circuits synthesis. The proposed gate is extendable according to the size of the circuit. The paper shows that the size of the synthesized circuits using the proposed gate is comparable with the size of the synthesized circuits using the hybrid reversible libraries for 3-in/out reversible …

On the Synthesis of Sequential Reversible Circuit

Reversible circuits for SR flip flop, JK flip flop, D flip flop, T flip flop, Master Slave D flip flop and Master Slave JK flip flop have been provided with three different logical approaches. All the circuits have been optimized with the help of existing local optimization algorithms (e.g. template matching, moving rule and deletion rule) and the optimized sequential circuits have been compared with the earlier proposals for the same. It has been shown that the present proposals have lower gate complexities and lower number of garbage bits compared to the earlier proposals. It has also been s…

Synthesis and Optimization of Reversible Circuits - A Survey

Reversible logic circuits have been historically motivated by theoretical research in low-power electronics as well as practical improvement of bit-manipulation transforms in cryptography and computer graphics. Recently, reversible circuits have attracted interest as components of quantum algorithms, as well as in photonic and nano-computing technologies where some switching devices offer no signal gain. Research in generating reversible logic distinguishes between circuit synthesis, post-synthesis optimization, and technology mapping. In this survey, we review algorithmic paradigms --- search…

A Study of Optimal 4-bit Reversible Toffoli Circuits and Their Synthesis

Optimal synthesis of reversible functions is a non-trivial problem. One of the major limiting factors in computing such circuits is the sheer number of reversible functions. Even restricting synthesis to 4-bit reversible functions results in a huge search space (16! {\approx} 2^{44} functions). The output of such a search alone, counting only the space required to list Toffoli gates for every function, would require over 100 terabytes of storage. In this paper, we present two algorithms: one, that synthesizes an optimal circuit for any 4-bit reversible specification, and another that synthesiz…

Ancilla-free synthesis of large reversible functions using binary decision diagrams

The synthesis of reversible functions has been an intensively studied research area in the last decade. Since almost all proposed approaches rely on representations of exponential size (such as truth tables and permutations), they cannot be applied efficiently to reversible functions with more than 15 variables. In this paper, we propose an ancilla-free synthesis approach based on Young subgroups using symbolic function representations that can efficiently be implemented with binary decision diagrams (BDDs). As a result, the algorithm not only allows to synthesize large reversible functions wi…

Reversible Logic Synthesis by Quantum Rotation Gates

A rotation-based synthesis framework for reversible logic is proposed. We develop a canonical representation based on binary decision diagrams and introduce operators to manipulate the developed representation model. Furthermore, a recursive functional bi-decomposition approach is proposed to automatically synthesize a given function. While Boolean reversible logic is particularly addressed, our framework constructs intermediate quantum states that may be in superposition, hence we combine techniques from reversible Boolean logic and quantum computation. The proposed approach results in quadra…

Depth-Optimized Reversible Circuit Synthesis

In this paper, simultaneous reduction of circuit depth and synthesis cost of reversible circuits in quantum technologies with limited interaction is addressed. We developed a cycle-based synthesis algorithm which uses negative controls and limited distance between gate lines. To improve circuit depth, a new parallel structure is introduced in which before synthesis a set of disjoint cycles are extracted from the input specification and distributed into some subsets. The cycles of each subset are synthesized independently on different sets of ancillae. Accordingly, each disjoint set can be synt…

Fault Tolerant Synthesis of Reversible Circuits

Reversible computing has emerged as a possible low cost alternative to conventional computing in terms of speed, power consumption and computing capability. In order to achieve reliable circuits in reversible computing, provision for fault tolerance is necessary. A number of fault models, fault tolerant techniques (such as parity-preserving) and testing approaches have proposed in literature. This dissertation exploits parity-preserving characteristics of two reversible gates which provide low cost parity-preserving based fault tolerance. In order to extend online testability of reversible cir…

近最优的量子拟度模型中可逆函数合成

Almost Optimal Synthesis of Reversible Function in Qudit Model

本文提出了一种在 qudit 模型中高效合成可逆函数的方法，通过 Θ(d) (n - 1)-qudit 子电路实现渐近最优，并利用 O(n d^n) 个门和单个 ancilla 实现渐近紧致的合成。

Linear Nearest Neighbor Synthesis of Reversible Circuits by Graph Partitioning

Linear Nearest Neighbor (LNN) synthesis in reversible circuits has emerged as an important issue in terms of technological implementation for quantum computation. The objective is to obtain a LNN architecture with minimum gate cost. As achieving optimal synthesis is a hard problem, heuristic methods have been proposed in recent literature. In this work we present a graph partitioning based approach for LNN synthesis with reduction in circuit cost. In particular, the number of SWAP gates required to convert a given gate-level quantum circuit to its equivalent LNN configuration is minimized. Our…

Reversible k-valued logic circuits are finitely generated for odd k

In his 2003 paper "Towards an algebraic theory of Boolean circuits", Lafont notes that the class of reversible circuits over a set of k truth values is finitely generated when k is odd. He cites a private communication for the proof. The purpose of this short note is to make the content of that communication available.

Cayley graphs and analysis of quantum cost for reversible circuit synthesis

We propose the theory of Cayley graphs as a framework to analyse gate counts and quantum costs resulting from reversible circuit synthesis. Several methods have been proposed in the reversible logic synthesis literature by considering different libraries whose gates are associated to the generating sets of certain Cayley graphs. In a Cayley graph, the distance between two vertices corresponds to the optimal circuit size. The lower bound for the diameter of Cayley graphs is also a lower bound for the worst case for any algorithm that uses the corresponding gate library. In this paper, we study …

A Library-Based Synthesis Methodology for Reversible Logic

In this paper, a library-based synthesis methodology for reversible circuits is proposed where a reversible specification is considered as a permutation comprising a set of cycles. To this end, a pre-synthesis optimization step is introduced to construct a reversible specification from an irreversible function. In addition, a cycle-based representation model is presented to be used as an intermediate format in the proposed synthesis methodology. The selected intermediate format serves as a focal point for all potential representation models. In order to synthesize a given function, a library c…

Representation of Boolean Quantum Circuits as Reed-Muller Expansions

In this paper we show that there is a direct correspondence between quantum Boolean operations and certain forms of classical (non-quantum) logic known as Reed-Muller expansions. This allows us to readily convert Boolean circuits into their quantum equivalents. A direct result of this is that the problem of synthesis and optimization of quantum Boolean logic can be tackled within the field of Reed-Muller logic.

Reversible Circuit Synthesis Using a Cycle-Based Approach

Reversible logic has applications in various research areas including signal processing, cryptography and quantum computation. In this paper, direct NCT-based synthesis of a given $k$-cycle in a cycle-based synthesis scenario is examined. To this end, a set of seven building blocks is proposed that reveals the potential of direct synthesis of a given permutation to reduce both quantum cost and average runtime. To synthesize a given large cycle, we propose a decomposition algorithm to extract the suggested building blocks from the input specification. Then, a synthesis method is introduced whic…

可逆函数的可扩展综合算法

A Scalable Synthesis Algorithm for Reversible Functions

本文提出一种基于变换和Quine-McCluskey算法改编的可扩展可逆电路精确综合方法，结合搜索空间缩减技术，显著减少T门层数，适用于NISQ硬件。

A framework for reversible circuit complexity

Reversible single-target gates are a generalization of Toffoli gates which are a helpful formal representation for the description of synthesis algorithms but are too general for an actual implementation based on some technology. There is an exponential lower bound on the number of Toffoli gates required to implement any reversible function, however, there is also a linear upper bound on the number of single-target gates which can be proven using a constructive proof based on a former presented synthesis algorithm. Since single-target gates can be mapped to a cascade of Toffoli gates, this syn…

Reversible Logic Synthesis with Minimal Usage of Ancilla Bits

Reversible logic has attracted much research interest over the last few decades, especially due to its application in quantum computing. In the construction of reversible gates from basic gates, ancilla bits are commonly used to remove restrictions on the type of gates that a certain set of basic gates generates. With unlimited ancilla bits, many gates (such as Toffoli and Fredkin) become universal reversible gates. However, ancilla bits can be expensive to implement, thus making the problem of minimizing necessary ancilla bits a practical topic. This thesis explores the problem of reversible …

Gaussian Elimination versus Greedy Methods for the Synthesis of Linear Reversible Circuits

Linear reversible circuits represent a subclass of reversible circuits with many applications in quantum computing. These circuits can be efficiently simulated by classical computers and their size is polynomially bounded by the number of qubits, making them a good candidate to deploy efficient methods to reduce computational costs. We propose a new algorithm for synthesizing any linear reversible operator by using an optimized version of the Gaussian elimination algorithm coupled with a tuned LU factorization. We also improve the scalability of purely greedy methods. Overall, on random operat…

可逆电路的完整变换规则集

A complete set of transformation rules for reversible circuits

本文提出首个完整的可逆电路变换规则集，通过规范电路表示证明了规则的完整性，确保任意可逆电路可通过规则转换为规范形式。

SyReC Synthesizer: An MQT tool for synthesis of reversible circuits

Reversible circuits form the backbone for many promising emerging technologies such as quantum computing, low power/adiabatic design, encoder/decoder devices, and several other applications. In the recent years, the scalable synthesis of such circuits has gained significant attention. In this work, we present the SyReC Synthesizer, a synthesis tool for reversible circuits based on the hardware description language SyReC. SyReC allows to describe reversible functionality at a high level of abstraction. The provided SyReC Synthesizer then realizes this functionality in a push-button fashion. Cor…

面向近期量子纠错的确定性容错态制备：基于布尔可满足性的自动综合

Deterministic Fault-Tolerant State Preparation for Near-Term Quantum Error Correction: Automatic Synthesis Using Boolean Satisfiability

本文提出利用布尔可满足性等经典电路设计技术，为当前及近期硬件可实现的一类量子码自动综合确定性、最优容错态制备电路，并通过电路级噪声模拟验证。

基于X-Map决策图的Oracle综合

Oracle Synthesis Based on X-Map Decision Diagrams

本文提出X-Map决策图（XMDD）表示布尔函数，并基于此开发优化量子Oracle综合算法，在超过七个输入变量的函数上同时降低T计数和CX计数，优于现有方法。

Simple circuit simulations of classical and quantum Turing machines

We construct reversible Boolean circuits efficiently simulating reversible Turing machines. Both the circuits and the simulation proof are rather simple. Then we give a fairly straightforward generalization of the circuits and the simulation proof to the quantum case.

面向可逆与量子技术的二输入多值输出光级联电路的综合

Synthesis of Binary-Input Multi-Valued Output Optical Cascades for Reversible and Quantum Technologies

本研究拓展基于群论的分解方法，设计二输入奇素数多值输出的光量子级联电路，提出局部简化变换并给出任意n变量输入、k值输出函数的门数上界。

New designs of reversible sequential devices

A clear protocol for synthesis of sequential reversible circuits from any particular gate library has been provided. Using that protocol, reversible circuits for SR latch, D latch, JK latch and T latch are designed from NCT gate library. All the circuits have been optimized with the help of existing local optimization algorithms (e.g. template matching, moving rule and deletion rule). It has been shown that the present proposals have lower gate complexities, lower number of garbage bits, lower quantum cost and lower number of feedback loops compared to the earlier proposals. For a fair compari…

基于离散门集合的可证明最优精确门合成

Provably optimal exact gate synthesis from a discrete gate set

本研究针对容错量子计算需求，提出将离散门集合的精确线路合成问题转化为SAT实例的方法，可证明门数最优，支持多种扩展，适用于小型常用子线路的量子线路设计。

用于高效量子综合的因式分解布尔表示

Factorized Boolean representations for efficient quantum synthesis

该研究提出因式分解布尔表示，突破传统逻辑最小化的局限，通过提取布尔表达式的共享因子优化量子综合，在减少量子比特数的同时降低超线性控制成本，提升电路执行效率。

BHT-QAOA：推广量子近似优化算法以将任意布尔问题作为哈密顿量求解

BHT-QAOA: Generalizing Quantum Approximate Optimization Algorithm to Solve Arbitrary Boolean Problems as Hamiltonians

本研究提出BHT-QAOA方法，将经典布尔问题经预言机转换为QAOA哈密顿量求解，大幅缩减量子电路资源，经IBM量子计算机等验证有效，为混合量子领域的工程应用提供新路径。

Design Automation and Design Space Exploration for Quantum Computers

A major hurdle to the deployment of quantum linear systems algorithms and recent quantum simulation algorithms lies in the difficulty to find inexpensive reversible circuits for arithmetic using existing hand coded methods. Motivated by recent advances in reversible logic synthesis, we synthesize arithmetic circuits using classical design automation flows and tools. The combination of classical and reversible logic synthesis enables the automatic design of large components in reversible logic starting from well-known hardware description languages such as Verilog. As a prototype example for ou…

Reducing Quantum Cost in Reversible Toffoli Circuits

Recently, reversible circuit synthesis has been intensively studied. One of the problems that has not been solved for a long time was exact minimization of gate count (GC) in 4-bit circuits. Finally, last year a tool of practical usage for finding optimal gate count Toffoli networks for any 4-variable function was developed. However, not much work has been done yet on exact minimization of quantum cost (QC) in 4-bit circuits. This paper presents an application of the above mentioned tool to reducing QC of 4-bit reversible circuits. It is shown that for benchmarks and for designs taken from rec…

Rule-Based Optimization of Reversible Circuits

Reversible logic has applications in various research areas including low-power design and quantum computation. In this paper, a rule-based optimization approach for reversible circuits is proposed which uses both negative and positive control Toffoli gates during the optimization. To this end, a set of rules for removing NOT gates and optimizing sub-circuits with common-target gates are proposed. To evaluate the proposed approach, the best-reported synthesized circuits and the results of a recent synthesis algorithm which uses both negative and positive controls are used. Our experiments reve…

基于张量分解的可逆逻辑电路综合算法

An Algorithm for Reversible Logic Circuit Synthesis Based on Tensor Decomposition

本文提出基于张量分解的可逆逻辑电路综合算法，通过将n位置换映射转化为张量并迭代缩减规模，减少$C^2\\!X$门使用，实现可逆逻辑电路的高效综合。

Reversible Logic Based Concurrent Error Detection Methodology For Emerging Nanocircuits

Reversible logic has promising applications in emerging nanotechnologies, such as quantum computing, quantum dot cellular automata and optical computing, etc. Faults in reversible logic circuits that result in multi-bit error at the outputs are very tough to detect, and thus in literature, researchers have only addressed the problem of online testing of faults that result single-bit error at the outputs based on parity preserving logic. In this work, we propose a methodology for the concurrent error detection in reversible logic circuits to detect faults that can result in multi-bit error at t…

利用ESOP编码提升量子SAT求解器性能

Performance Gains in Quantum SAT Solvers Using ESOP Encoding

本文研究了专为量子SAT求解设计的ESOP-CNF编码（e-CNF），通过减少量子资源消耗提升求解效率。

Reversible circuit compilation with space constraints

We develop a framework for resource efficient compilation of higher-level programs into lower-level reversible circuits. Our main focus is on optimizing the memory footprint of the resulting reversible networks. This is motivated by the limited availability of qubits for the foreseeable future. We apply three main techniques to keep the number of required qubits small when computing classical, irreversible computations by means of reversible networks: first, wherever possible we allow the compiler to make use of in-place functions to modify some of the variables. Second, an intermediate repres…

Faster Quantum Number Factoring via Circuit Synthesis

A major obstacle to implementing Shor's quantum number-factoring algorithm is the large size of modular-exponentiation circuits. We reduce this bottleneck by customizing reversible circuits for modular multiplication to individual runs of Shor's algorithm. Our circuit-synthesis procedure exploits spectral properties of multiplication operators and constructs optimized circuits from the traces of the execution of an appropriate GCD algorithm. Empirically, gate counts are reduced by 4-5 times, and circuit latency is reduced by larger factors.

基于多策略的量子布尔电路量子成本降低

Multi-strategy Based Quantum Cost Reduction of Quantum Boolean Circuits

针对PPRM表示的布尔函数，本文提出项重排与MCT分解化简两种算法，将MCT门映射为NCV门以降低量子成本，并可用于IBM量子计算机。

SAQC：一种面向基于QAOA的量子优化的SAT感知编译框架

SAQC: A SAT-Aware Compilation Framework for QAOA-Based Quantum Optimization

SAQC提出一种SAT感知的编译框架，通过SAT中间表示保留布尔结构，支持CNF和eCNF，并优化子句处理，显著降低电路深度和编译时间。

Logic circuits from zero forcing

We design logic circuits based on the notion of zero forcing on graphs; each gate of the circuits is a gadget in which zero forcing is performed. We show that such circuits can evaluate every monotone Boolean function. By using two vertices to encode each logical bit, we obtain universal computation. We also highlight a phenomenon of "back forcing" as a property of each function. Such a phenomenon occurs in a circuit when the input of gates which have been already used at a given time step is further modified by a computation actually performed at a later stage. Finally, we point out that zero…