Adapting electronics to perfectly conform to non-planar and rough surfaces, such as human skin, is a very challenging task which, if solved, could open up new applications in fields of high economic and scientific interest ranging from health to robotics, wearable electronics, human machine interface and Internet of Things. The key to success lies in defining a technology that can lead to the fabrication of ultra-thin devices while exploiting materials that are ultimately thin, with high mechanical flexibility and excellent electrical properties. Here, we report a hybrid approach for the definition of high-performance, ultra-thin and conformable electronic devices and circuits, based on the integration of ultimately thin semiconducting transition metal dichalcogenides (TMDC), i.e., MoS2, with organic gate dielectric material, i.e., polyvinyl formal (PVF) combined with the ink-jet printing of conductive PEDOT:PSS ink for electrodes definition. Through this cost-effective, fully bottom-up and solution-based approach, transistors and simple digital and analogue circuits are fabricated by a sequential stacking of ultrathin (nanometer) layers on a few micron thick polyimide substrate, which guarantees the high flexibility mandatory for the targeted applications.
Organic printed electronics has proven its potential as an essential enabler for applications related to healthcare, entertainment, energy and distributed intelligent objects. The possibility of exploiting solution-based and direct-writing production schemes further boosts the benefits offered by such technology, facilitating the implementation of cheap, conformable, bio-compatible electronic applications. The result shown in this work challenges the widespread assumption that such class of electronic devices is relegated to low-frequency operation, owing to the limited charge mobility of the …
Conformable Electronics refers to a class of electronic devices that have the ability to conformally adhere onto non-planar surfaces and materials, resulting particularly appealing for skin applications, such as the case of skin-worn unobtrusive (bio)sensors for healthcare monitoring. Conformability can be addressed by integrating basic electronic components on ultrathin polymeric film substrates. Among other basic electronic components, capacitors are fundamental ones for energy storage, sensing, frequency tuning, impedance adaptation and signal processing. In this work we present a novel app…
The miniaturization of diagnostic devices that exploit optical detection schemes requires the design of light-sources combining small size, high performance for effective excitation of chromophores, and mechanical flexibility for easy coupling to components with complex and non-planar shapes. Here, ZnO nanowire-in-fiber hybrids with internal architectural order are introduced, exhibiting a combination of polarized stimulated emission, low propagation losses of light modes, and structural flexibility. Ultrafast transient absorption experiments on the electrospun material show optical gain which…
Gallium-based liquid metal is getting increased attention in conformal flexible electronics for its high electrical conductivity, intrinsic deformability and biocompatibility. A series of flexible devices are developed based on the micro-particles of liquid metal. But it is still challenging to fabricate conformal liquid metal film with a large area and high uniformity. Interfacial self-assembly is a competitive candidate method. Traditional interfacial self-assembly methods have difficulties assembling liquid metal particles because the floating state of the high-density microparticles could …
The performance of ultra-wide band gap materials like $β$-Ga$_\mathrm{2}$O$_\mathrm{3}$ is critically dependent on achieving high average electric fields within the active region of the device. In this report, we show that high-k gate dielectrics like BaTiO$_\mathrm{3}$ can provide an efficient field management strategy by improving the uniformity of electric field profile in the gate-drain region of lateral field effect transistors. Using this strategy, we were able to achieve high average breakdown fields of 1.5 MV/cm and 4 MV/cm at gate-drain spacing (L$_\mathrm{gd}$) of 6 um and 0.6 um res…
In this work, a physics based model is developed to calculate the hole mobility of ultra-thin-body double-gate junctionless transistors. Six-band $k\cdot p$ Schrödinger equation and Poisson equation are solved self-consistently. The obtained wave-functions and energies are stored in look-up tables. Hole mobility can be derived using the Kubo-Greenwood formula accounting for impurity, acoustic and optical phonon, and surface roughness scattering. Initial benchmark results are shown.
High drive current is a critical performance parameter in semiconductor devices for high-speed, low-power logic applications or high-efficiency, high-power, high-speed radio frequency (RF) analog applications. In this work, we demonstrate an In2O3 transistor grown by atomic layer deposition (ALD) at back-end-of-line (BEOL) compatible temperatures with a record high drain current exceeding 10 A/mm, the performance of which is 2-3 times better than all known transistors with semiconductor channels. A record high transconductance of 4 S/mm is also achieved among all transistors with a planar stru…
We fabricate monolayer MoS2 field effect transistors and study their electric characteristics from 10^-6 Torr to atmospheric air pressure. We show that the threshold voltage of the transistor increases with the growing pressure. Hence, we propose the device as an air pressure sensor, showing that it is particularly suitable as a low power consumption vacuum gauge. The device functions on pressure-dependent O2, N2 and H2O molecule adsorption that affect the n-doping of the MoS2 channel.
Ultra-Wide Bandgap AlGaN Heterostructure Field Effect Transistors with Current Gain Cutoff Frequency Above 85 GHz
The Ohio State University（俄亥俄州立大学）；Sandia National Laboratories（桑迪亚国家实验室）；University of California, Santa Barbara（加州大学圣塔芭芭拉分校）；Air Force Research Laboratory（空军研究实验室）
At the LaAlO$_3$-SrTiO$_3$ interface, electronic phase transitions can be triggered by modulation of the charge carrier density, making this system an excellent prospect for the realization of versatile electronic devices. Here, we report repeatable transistor operation in locally gated LaAlO$_3$-SrTiO$_3$ field-effect devices of which the LaAlO$_3$ dielectric is only four unit cells thin, the critical thickness for conduction at this interface. This extremely thin dielectric allows a very efficient charge modulation of ${\sim}3.2\times10^{13}$ cm$^{-2}$ within a gate-voltage window of $\pm1$ …
Scaled Ultra-Wide Bandgap AlGaN Polarization-Graded FET with Ultra-thin Buffer Layer
The Ohio State University（俄亥俄州立大学）；Sandia National Laboratories（桑迪亚国家实验室）；University of California, Santa Barbara（加州大学圣塔芭芭拉分校）；Air Force Research Laboratory（空军研究实验室）；University of Maryland, College Park（马里兰大学帕克分校）
Using accurate dissipative DFT-NEGF atomistic-simulation techniques within the Wannier-Function formalism, we give a fresh look at the possibility of sub-10 nm scaling for high-performance CMOS applications. We show that a combination of good electrostatic control together with a high mobility is paramount to meet the stringent roadmap targets. Such requirements typically play against each other at sub-10 nm gate length for MOS transistors made of conventional semiconductor materials like Si, Ge or III-V and dimensional scaling is expected to end around 12 nm gate-length. We demonstrate that u…
Continued dimensional scaling of semiconductor devices has driven information technology into vastly diverse applications. As the size of devices approaches fundamental limits, metrology techniques with nanometre resolution and three-dimensional (3D) capabilities are desired for device optimisation. For example, the performance of an ultra-scaled transistor can be strongly influenced by the local electric field and strain. Here we study the spectral response of single erbium ions to applied electric field and strain in a silicon ultra-scaled transistor. Stark shifts induced by both the overall…
In this paper, we develop an analytic physics-based model to describe current conduction in ultra-thin black phosphorus (BP) field-effect transistors (FETs). The model extends the concept of virtual source charge calculation to capture the effect of both hole and electron charges for ambipolar transport characteristics. The model comprehends the in-plane band-structure anisotropy in BP, as well as the asymmetry in electron and hole current conduction characteristics. The model also includes the effect of Schottky-type source/drain contact resistances, which are voltage-dependent and can signif…
The development of high-performance multifunctional polymer-based electronic circuits is a major step towards future flexible electronics. Here, we demonstrate a tunable approach to fabricate such devices based on rationally designed dielectric super-lattice structures with photochromic azo-benzene molecules. These nanodielectrics possessing ionic, molecular, and atomic polarization are utilized in polymer thin-film transistors (TFTs) to realize high performance electronics with p-type field-effect mobility exceeding 2 cm^2/(V.s). A crossover in the transport mechanism from electrostatic dipol…
Investigating lateral electrical transport in p-type thin film chalcogenides is important to evaluate their potential for field-effect transistors (FETs) and phase-change memory applications. For instance, p-type FETs with sputtered materials at low temperature (<= 250 C) could play a role in flexible electronics or back-end-of-line (BEOL) silicon-compatible processes. Here, we explore lateral transport in chalcogenide films (Sb2Te3, Ge2Sb2Te5, Ge4Sb6Te7) and multilayers, with Hall measurements (in <= 50 nm thin films) and with p-type transistors (in <= 5 nm ultrathin films). The highest Hall …
We report the development of nanowire field-effect transistors featuring an ultra-thin parylene film as a polymer gate insulator. The room temperature, gas-phase deposition of parylene is an attractive alternative to oxide insulators prepared at high temperatures using atomic layer deposition. We discuss our custom-built parylene deposition system, which is designed for reliable and controlled deposition of <100 nm thick parylene films on III-V nanowires standing vertically on a growth substrate or horizontally on a device substrate. The former case gives conformally-coated nanowires, which we…
The valley degree of freedom in many-valley semiconductors provides a new paradigm for storing and processing information in valleytronic and quantum-computing applications. Achieving practical devices require all-electric control of long-lived valley-polarized states, without the use of strong external magnetic fields. Attributable to the extreme strength of the carbon-carbon bond, diamond possesses exceptionally stable valley states which provides a useful platform for valleytronic devices. Using ultra-pure single-crystalline diamond, we here demonstrate electrostatic control of valley-curre…
Metal oxide thin-film transistors are fast becoming a ubiquitous technology for application in driving backplanes of organic light-emitting diode displays. Currently all commercial products rely on metal oxides processed via physical vapor deposition methods. Transition to simpler, higher throughput manufacturing methods such as solution-based processes, are currently been explored as cost-effective alternatives. However, developing printable oxide transistors with high carrier mobility and bias-stable operation has proved challenging. Here we show that hybrid multilayer channels composed of a…
Two-dimensional (2D) semiconductors offer a promising prospect for high-performance and energy-efficient devices especially in the sub-10 nm regime. Inspired by the successful fabrication of 2D $β$-TeO$_2$ and the high on/off ratio and high air-stability of fabricated field effect transistors (FETs) [Nat. Electron. 2021, 4, 277], we provide a comprehensive investigation of the electronic structure of monolayer $β$-TeO$_2$ and the device performance of sub-10 nm metal oxide semiconductors FETs (MOSFETs) based on this material. The anisotropic electronic structure of monolayer $β$-TeO$_2$ plays …
Hot LO Phonon-Induced RF Nonlinearity in GaN High-Electron-Mobility Transistors
University of Illinois Urbana-Champaign（伊利诺伊大学厄巴纳-香槟分校）；Air Force Research Laboratory Sensors Directorate（空军研究实验室传感器管理局）；Michigan State University（密歇根州立大学）
This brief proposes an analytical approach to model the dc electrical behavior of extremely narrow cylindrical junctionless nanowire field-effect transistor (JLNW-FET). The model includes explicit expressions, taking into account the first-order perturbation theory for calculating eigenstates and corresponding wave functions obtained by the Schrodinger equation in the cylindrical coordinate. Assessment of the proposed model with technology computer-aided design (TCAD) simulations and measurement results confirms its validity for all regions of operation. This represents an essential step towar…
Recent measurements on ultra-thin body Negative Capacitance Field Effect Transistors have shown subthreshold behaviors that are not expected in a classical MOSFET. Specifically, subthreshold swing was found to decrease with increased gate bias in the subthreshold region for devices measured over multiple gate lengths down to 30 nm. In addition, improvement in the subthreshold swing relative to control devices showed a non-monotonic dependence on the gate length. In this paper, using a Landau-Khanatnikov ferroelectric gate stack model calibrated with measured Capacitance-Voltage, we show that b…
To explore the potential of field-effect transistors (FETs) based on monolayers of the two-dimensional semiconducting channel(SC) for spintronics, the two most important issues are to ensure the formation of variable low resistive tunnel ferromagnetic contacts(FC), and to preserve intrinsic properties of the SC during fabrication. Large Schottky barriers lead to the formation of high resistive contacts and methods adopted to control the barriers often alter the intrinsic properties of the SC. This work aims at addressing both issues in fully encapsulated monolayer WSe$_2$ FETs by using bi-laye…
In this letter, we design and demonstrate an improved MOCVD grown reverse Al-composition graded contact layer to achieve low resistance contact to MOCVD grown ultra-wide bandgap (UWBG) Al0.70Ga0.30N channel metal semiconductor field-effect transistors (MESFETs). Increasing the thickness of the reverse graded layer was found to improve contact layer resistance significantly, leading to contact resistance of 3.3x10^-5 Ohm.cm2. Devices with gate length, LG, of 0.6 microns and source-drain spacing, LSD, of 1.5 microns displayed a maximum current density, IDSMAX, of 635 mA/mm with an applied gate v…
The device concept of ferroelectric-based negative capacitance (NC) transistors offers a promising route for achieving energy-efficient logic applications that can outperform the conventional semiconductor technology, while viable operation mechanisms remain a central topic of debate. In this work, we report steep slope switching in MoS$_2$ transistors back-gated by single-layer polycrystalline PbZr$_{0.35}$Ti$_{0.65}$O$_3$. The devices exhibit current on/off ratios up to 8$\times$10$^6$ within an ultra-low gate voltage window of $V_g$ = $\pm$0.5 V and subthreshold swing (SS) as low as 9.7 mV …
Beyond conventional organic thin-film transistors, this thesis explores possible paths for the fourth wave of organic electronics. In this context, mixed ionic-electronic conductors and organic electro-chemical transistors (OECTs) are identified as highly promising approaches for electronic bio-interfaces enabling ultra-sensitive detection of biological signals. Furthermore, these systems show fundamental properties of biological synapses, namely the synaptic plasticity, which renders the possibility to build brain-inspired, neuromorphic networks enabling highly efficient computing. In particu…
The Von-Neumann bottleneck is a clear limitation for data-intensive applications, bringing in-memory computing (IMC) solutions to the fore. Since large data sets are usually stored in nonvolatile memory (NVM), various solutions have been proposed based on emerging memories, such as OxRAM, that rely mainly on area hungry, one transistor (1T) one OxRAM (1R) bit-cell. To tackle this area issue, while keeping the programming control provided by 1T1R bit-cell, we propose to combine gate-all-around stacked junctionless nanowires (1JL) and OxRAM (1R) technology to create a 3-D memory pillar with ultr…
We studied time resolution and response power dependence of three terahertz detectors based on significantly different types of field effect transistors. We analyzed the photoresponse of custom-made Si junctionless FETs, Si MOSFETs and GaAs-based high electron mobility transistors detectors. Applying monochromatic radiation of high power, pulsed, line-tunable molecular THz laser, which operated at frequencies in the range from 0.6-3.3 THz, we demonstrated that all these detectors have at least nanosecond response time. We showed that detectors yield a linear response in a wide range of radiati…
We report a new approach to integrating high-\k{appa} dielectrics in both bottom- and top-gated MoS2 field-effect transistors (FETs) through thermal oxidation and mechanical assembly of layered twodimensional (2D) TaS2. Combined X-ray photoelectron spectroscopy (XPS), optical microscopy, atomic force microscopy (AFM), and capacitance-voltage (C-V) measurements confirm that multilayer TaS2 flakes can be uniformly transformed to Ta2O5 with a high dielectric constant of ~ 15.5 via thermal oxidation, while preserving the geometry and ultra-smooth surfaces of 2D TMDs. Top-gated MoS2 FETs fabricated…
We demonstrate the fabrication of a single electron transistor device based on a single ultra-small silicon quantum dot connected to a gold break junction with a nanometer scale separation. The gold break junction is created through a controllable electromigration process and the individual silicon quantum dot in the junction is determined to be a Si_170 cluster. Differential conductance as a function of the bias and gate voltage clearly shows the Coulomb diamond which confirms that the transport is dominated by a single silicon quantum dot. It is found that the charging energy can be as large…
Complementary metal oxide semiconductor (CMOS) logic circuits at the ultimate scaling limit place the utmost demands on the properties of all materials involved. The requirements for semiconductors are well explored and could possibly be satisfied by a number of layered two-dimensional (2D) materials, like for example transition-metal dichalcogenides or black phosphorus. The requirements for the gate insulator are arguably even more challenging and difficult to meet. In particular the combination of insulator to semiconductor which forms the central element of the metal oxide semiconductor fie…
