arXivDaily arXiv每日学术速递 周一至周五更新
arXiv周末暂无论文更新,休息一下吧,周末愉快~~
arXiv 2512.08086cond-mat.mtrl-scicond-mat.mes-hallcond-mat.str-elphysics.app-phquant-ph
收藏

莫尔工程铁电晶体管用于近无陷阱、低功耗和非易失性二维电子

Moire-Engineered Ferroelectric Transistors for Nearly Trap-free, Low-Power and Non-Volatile 2D Electronics

Arup Singha, Shaili Sett, Kenji Watanabe, Takashi Taniguchi, Arindam Ghosh, Rahul Debnath

AI总结:

通过莫尔工程铁电晶体管实现低功耗、非易失性二维电子功能,利用原子级清洁界面和超快铁电切换。

摘要:

扭曲的WSe2中的长程莫尔图案使一种内置的、莫尔长度尺度的铁电极化得以直接用于电子设备。这种内置的铁电景观为在二维材料中实现超低电压和非易失性电子功能提供了有吸引力的途径;然而,实现稳定极化控制而无需电荷陷阱仍是一个持续的挑战。在此,我们展示了一种利用扭曲WSe2双层制成的莫尔工程铁电场效应晶体管(FeFET),它利用原子级清洁的范德瓦尔斯界面,实现了高效的极化-通道耦合和抑制陷阱、超低电压操作(亚阈值摆幅为64 mV/十年)。该器件表现出稳定的非易失性存储窗口为0.10 V,高迁移率,超过了之前报道的二维FeFET的性能,与先进的硅基器件性能相匹配。此外,电容-电压光谱,通过自洽的Landau-Ginzburg-Devonshire模型得到证实,表明超快铁电切换(~0.5微秒)。这些结果确立了莫尔工程铁电性作为实现超清洁、低功耗和非易失性二维电子的实用且可扩展的途径,将原子级晶格工程与功能器件架构结合起来,为下一代存储和逻辑技术奠定基础。

英文摘要:

Long-range moire patterns in twisted WSe2 enable a built-in, moire-length-scale ferroelectric polarization that can be directly harnessed in electronic devices. Such a built-in ferroic landscape offers a compelling means to enable ultralow-voltage and non-volatile electronic functionality in two-dimensional materials; however, achieving stable polarization control without charge trapping has remained a persistent challenge. Here, we demonstrate a moire-engineered ferroelectric field-effect transistor (FeFET) utilizing twisted WSe2 bilayers that leverages atomically clean van der Waals interfaces to achieve efficient polarization-channel coupling and trap-suppressed, ultralow-voltage operation (subthreshold swing of 64 mV per decade). The device exhibits a stable non-volatile memory window of 0.10 V and high mobility, exceeding the performance of previously reported two-dimensional FeFET and matching that of advanced silicon-based devices. In addition, capacitance-voltage spectroscopy, corroborated by self-consistent Landau-Ginzburg-Devonshire modeling, indicates ultrafast ferroelectric switching (~0.5 microseconds). These results establish moire-engineered ferroelectricity as a practical and scalable route toward ultraclean, low-power, and non-volatile 2D electronics, bridging atomistic lattice engineering with functional device architectures for next-generation memory and logic technologies.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

↑