Single-electron operation of a silicon-CMOS 2x2 quantum dot array with integrated charge sensing
Will Gilbert, Andre Saraiva, Wee Han Lim, Chih Hwan Yang, Arne Laucht, Benoit Bertrand, Nils Rambal, Louis Hutin, Christopher C. Escott, Maud Vinet, Andrew S. Dzurak
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12 pages and 6 figures, including supplementary material
The advanced nanoscale integration available in silicon complementary metal-oxide-semiconductor (CMOS) technology provides a key motivation for its use in spin-based quantum computing applications. Initial demonstrations of quantum dot formation and spin blockade in CMOS foundry-compatible devices are encouraging, but results are yet to match the control of individual electrons demonstrated in university-fabricated multi-gate designs. We show here that the charge state of quantum dots formed in a CMOS nanowire device can be sensed by using floating gates to electrostatically couple it to a remote single electron transistor (SET) formed in an adjacent nanowire. By biasing the nanowire and gates of the remote SET with respect to the nanowire hosting the quantum dots, we controllably form ancillary quantum dots under the floating gates, thus enabling the demonstration of independent control over charge transitions in a quadruple (2x2) quantum dot array. This device overcomes the limitations associated with measurements based on tunnelling transport through the dots and permits the sensing of all charge transitions, down to the last electron in each dot. We use effective mass theory to investigate the necessary optimization of the device parameters in order to achieve the tunnel rates required for spin-based quantum computation.
By means of catalytic chemical vapor deposition (CCVD) in-situ grown monolayer graphene field-effect transistors (MoLGFETs) and bilayer graphene transistors (BiLGFETs) are realized directly on oxidized silicon substrate without the need to transfer graphene layers. In-situ grown MoLGFETs exhibit the expected Dirac point together with the typical low on/off-current ratios. In contrast, BiLGFETs possess unipolar p-type device characteristics with an extremely high on/off-current ratio up to 1E7. The complete fabrication process is silicon CMOS compatible. This will allow a simple and low-cost in…
We explore phonon-mediated quantum transport through electronic noise characterization of a commercial CMOS transistor. The device behaves as a single electron transistor thanks to a single impurity atom in the channel. A low noise cryogenic CMOS transimpedance amplifier is exploited to perform low-frequency noise characterization down to the single electron, single donor and single phonon regime simultaneously, not otherwise visible through standard stability diagrams. Single electron tunneling as well as phonon-mediated features emerges in rms-noise measurements. Phonons are emitted at high …
Silicon quantum dots are attractive candidates for the development of scalable, spin-based qubits. Pauli spin blockade in double quantum dots provides an efficient, temperature independent mechanism for qubit readout. Here we report on transport experiments in double gate nanowire transistors issued from a CMOS process on 300 mm silicon-on-insulator wafers. At low temperature the devices behave as two few-electron quantum dots in series. We observe signatures of Pauli spin blockade with a singlet-triplet splitting ranging from 0.3 to 1.3 meV. Magneto-transport measurements show that transition…
Holes in silicon quantum dots are receiving significant attention due to their potential as fast, tunable, and scalable qubits in semiconductor quantum circuits. Despite this, challenges remain in this material system including difficulties using charge sensing to determine the number of holes in a quantum dot, and in controlling the coupling between adjacent quantum dots. In this work, we address these problems by fabricating an ambipolar complementary metal-oxide-semiconductor (CMOS) device using multilayer palladium gates. The device consists of an electron charge sensor adjacent to a hole …
Charge noise is one of the main sources of environmental decoherence for spin qubits in silicon, presenting a major obstacle in the path towards highly scalable and reproducible qubit fabrication. Here we demonstrate in-depth characterization of the charge noise environment experienced by a quantum dot in a CMOS-fabricated silicon nanowire. We probe the charge noise for different quantum dot configurations, finding that it is possible to tune the charge noise over two orders of magnitude, ranging from 1 ueV^2 to 100 ueV^2. In particular, we show that the top interface and the reservoirs are th…
One of the main advantages of silicon spin qubits over other solid-state qubits is their inherent scalability and compatibility with the 300 mm CMOS fabrication technology that is already widely used in the semiconductor industry, whilst maintaining high readout and gate fidelities. We demonstrate detection of a single electron spin using energy-selective readout in a CMOS-fabricated nanowire device with an integrated charge detector. We measure a valley splitting of 0.3 meV and 0.16 meV in two similar devices. The anisotropy of the spin-valley mixing is measured and shown to follow the depend…
We report fast charge state readout of a double quantum dot in a CMOS split-gate silicon nanowire transistor via the large dispersive interaction with microwave photons in a lumped-element resonator formed by hybrid integration with a superconducting inductor. We achieve a coupling rate $g_0/(2π) = 204 \pm 2$ MHz by exploiting the large interdot gate lever arm of an asymmetric split-gate device, $α=0.72$, and by inductively coupling to the resonator to increase its impedance, $Z_\text{r}=560~Ω$. In the dispersive regime, the large coupling strength at the double quantum dot hybridisation point…
Silicon, the main constituent of microprocessor chips, is emerging as a promising material for the realization of future quantum processors. Leveraging its well-established complementary metal-oxide-semiconductor (CMOS) technology would be a clear asset to the development of scalable quantum computing architectures and to their co-integration with classical control hardware. Here we report a silicon quantum bit (qubit) device made with an industry-standard fabrication process. The device consists of a two-gate, p-type transistor with an undoped channel. At low temperature, the first gate defin…
We review our recent efforts in building atom-scale quantum-dot cellular automata circuits on a silicon surface. Our building block consists of silicon dangling bond on a H-Si(001) surface, which has been shown to act as a quantum dot. First the fabrication, experimental imaging, and charging character of the dangling bond are discussed. We then show how precise assemblies of such dots can be created to form artificial molecules. Such complex structures can be used as systems with custom optical properties, circuit elements for quantum-dot cellular automata, and quantum computing. Consideratio…
Quantum photonic integrated circuit (QPIC) is a promising tool for constructing integrated devices for quantum technology applications. In the optical regime, silicon photonics empowered by complementary-metal-oxide-semiconductor (CMOS) technology provides optical components useful for realizing large-scale QPICs. Optical nonlinearity at the single-photon level is required for QPIC to facilitate photon-photon interaction. However, to date, realization of optical elements with deterministic( i.e., not probabilistic) single-photon nonlinearity by using silicon-based components is challenging, de…
Solid-state quantum computers require classical electronics to control and readout individual qubits and to enable fast classical data processing [1-3]. Integrating both subsystems at deep cryogenic temperatures [4], where solid-state quantum processors operate best, may solve some major scaling challenges, such as system size and input/output (I/O) data management [5]. Spin qubits in silicon quantum dots (QDs) could be monolithically integrated with complementary metal-oxide-semiconductor (CMOS) electronics using very-large-scale integration (VLSI) and thus leveraging over wide manufacturing …
The recent development of arrays of quantum dots in semiconductor nanostructures highlights the progress of quantum devices toward large scale. However, how to realize such arrays on a scalable platform such as silicon is still an open question. One of the main challenge resides in the detection of charges within the array. It is a prerequisite functionality to initialize a desired charge state and readout spins through spin-to-charge conversion mechanisms. In this paper, we use two methods based on either a single-lead charge detector, or a reprogrammable single electron transistor. Thanks to…
Quantum computers require interfaces with classical electronics for efficient qubit control, measurement and fast data processing. Fabricating the qubit and the classical control layer using the same technology is appealing because it will facilitate the integration process, improving feedback speeds and offer potential solutions to wiring and layout challenges. Integrating classical and quantum devices monolithically, using complementary metal-oxide-transistor (CMOS) processes, enables the processor to profit from the most mature industrial technology for the fabrication of large scale circui…
We report electronic transport on silicon double and triple dots created with the optimized number of two gates. Using silicon nitride spacers two dots in series are created below two top gates overlapping a silicon nanowire. Coupling between dots is controlled by gate voltages. A third dot is created either by combined action of gate voltages or local doping depending on the spacers length. The main characteristics of the triple dot stability diagram are quantitatively fitted.
Transport measurements at cryogenic temperatures through a few electron top gated quantum dot fabricated in a silicon/silicon-germanium heterostructure are reported. Variations in gate voltage induce a transition from an isolated dot toward a dot strongly coupled to the leads. In addition to Coulomb blockade, when the dot is strongly coupled to the leads, we observe the appearance of a zero bias conductance peak due to the Kondo effect. The Kondo peak splits in a magnetic field, and the splitting scales linearly with the applied field. We also observe a transition from pure Coulomb blockade to…
We report electron transport measurements of a silicon double dot formed in multi-gated metal-oxide-semiconductor structures with a 15-nm-thick silicon-on-insulator layer. Tunable tunnel coupling enables us to observe an excitation spectrum in weakly coupled dots and an energy level anticrossing in strongly coupled ones. Such a quantum dot molecule with both charge and energy quantization provides the essential prerequisite for future implementation of silicon-based quantum computations.
Considering a double-barrier structure formed by a silicon quantum dot covered by natural oxide, we derive simple conditions for the conductance of the dot to become a step-like function of the number of doping atoms inside the dot, with negligible dependence on the actual position of the dopants. The found conditions are feasible in experimentally available structures.
We present a novel reconfigurable metal-oxide-semiconductor multi-gate transistor that can host a quadruple quantum dot in silicon. The device consist of an industrial quadruple-gate silicon nanowire field-effect transistor. Exploiting the corner effect, we study the versatility of the structure in the single quantum dot and the serial double quantum dot regimes and extract the relevant capacitance parameters. We address the fabrication variability of the quadruple-gate approach which, paired with improved silicon fabrication techniques, makes the corner state quantum dot approach a promising …
We report charge sensing measurements on a silicon quantum dot (QD) with a nearby silicon single electron transistor (SET) acting as an electrometer. The devices are electrostatically formed in bulk silicon using surface gates. We show that as an additional electron is added onto the quantum dot, a charge is induced on the SET of approximately 0.2e. These measurements are performed in the many electron regime, where we can count in excess of 20 charge additions onto the quantum dot.
Silicon quantum dots are a leading approach for solid-state quantum bits. However, developing this technology is complicated by the multi-valley nature of silicon. Here we observe transport of individual electrons in a silicon CMOS-based double quantum dot under electron spin resonance. An anticrossing of the driven dot energy levels is observed when the Zeeman and valley splittings coincide. A detected anticrossing splitting of 60 MHz is interpreted as a direct measure of spin and valley mixing, facilitated by spin-orbit interaction in the presence of non-ideal interfaces. A lower bound of sp…
We report here the first realization of top-down silicon nanowires (SiNW) transduced by both junction-less field effect transistor (FET) and the piezoresistive (PZR) effect. The suspended SiNWs are among the smallest top-down SiNWs reported to date, featuring widths down to ~20nm. This has been achieved thanks to a 200mm-wafer-scale, VLSI process fully amenable to monolithic CMOS co-integration. Thanks to the very small dimensions, the conductance of the silicon nanowire can be controlled by a nearby electrostatic gate. Both the junction-less FET and the previously demonstrated PZR transductio…
Recent advances in quantum error correction (QEC) codes for fault-tolerant quantum computing \cite{Terhal2015} and physical realizations of high-fidelity qubits in a broad range of platforms \cite{Kok2007, Brown2011, Barends2014, Waldherr2014, Dolde2014, Muhonen2014, Veldhorst2014} give promise for the construction of a quantum computer based on millions of interacting qubits. However, the classical-quantum interface remains a nascent field of exploration. Here, we propose an architecture for a silicon-based quantum computer processor based entirely on complementary metal-oxide-semiconductor (…
Spins of donor electrons and nuclei in silicon are promising quantum bit (qubit) candidates which combine long coherence times with the fabrication finesse of the silicon nanotechnology industry. We outline a potentially scalable spin qubit architecture where donor nuclear and electron spins are coupled to spins of electrons in quantum dots and discuss requirements for donor placement aligned to quantum dots by single ion implantation.
The engineering of electron spin qubits in a compact unit cell embedding all quantum functionalities is mandatory for large scale integration. In particular, the development of a high-fidelity and scalable spin readout method remains an open challenge. Here we demonstrate high-fidelity and robust spin readout based on gate reflectometry in a CMOS device comprising one qubit dot and one ancillary dot coupled to an electron reservoir to perform readout. This scalable method allows us to read out a spin with a fidelity above 99% for 1 ms integration time. To achieve such fidelity, we exploit a la…
Optical interconnects are becoming attractive alternatives to electrical wiring in intra- and inter-chip communication links. Particularly, the integration with silicon complementary metal-oxide-semiconductor (CMOS) technology has received considerable interest due to the ability of cost-effective integration of electronics and optics on a single chip. While silicon enables the realization of optical waveguides and passive components, the integration of another, optically absorbing, material is required for photodetection. Germanium or compound semiconductors are traditionally used for this pu…
In this chapter, silicon nanowires that are compatible with CMOS fabrication processes have been described. It has been shown that these nanowires can be functionalized by conjugating monoclonal antibodies to their surface in order to build sensitive biochemical sensors. It has also been shown that by using frequency-based signals, all the necessary components to interrogate these nanowires can be built on low-cost CMOS processes.
We report charge sensing measurements of a silicon metal-oxide-semiconductor quantum dot using a single-electron transistor as a charge sensor with dynamic feedback control. Using digitallycontrolled feedback, the sensor exhibits sensitive and robust detection of the charge state of the quantum dot, even in the presence of charge drifts and random charge rearrangements. The sensor enables the occupancy of the quantum dot to be probed down to the single electron level.
The most promising quantum algorithms require quantum processors hosting millions of quantum bits when targeting practical applications. A major challenge towards large-scale quantum computation is the interconnect complexity. In current solid-state qubit implementations, a major bottleneck appears between the quantum chip in a dilution refrigerator and the room temperature electronics. Advanced lithography supports the fabrication of both CMOS control electronics and qubits in silicon. When the electronics are designed to operate at cryogenic temperatures, it can ultimately be integrated with…
We present electrical data of silicon single electron devices fabricated with CMOS techniques and protocols. The easily tuned devices show clean Coulomb diamonds at T = 30 mK and charge offset drift of 0.01 e over eight days. In addition, the devices exhibit robust transistor characteristics including uniformity within about 0.5 V in the threshold voltage, gate resistances greater than 10 GΩ, and immunity to dielectric breakdown in electric fields as high as 4 MV/cm. These results highlight the benefits in device performance of a fully CMOS process for single electron device fabrication.
The construction of quantum computer simulators requires advanced software which can capture the most significant characteristics of the quantum behavior and quantum states of qubits in such systems. Additionally, one needs to provide valid models for the description of the interface between classical circuitry and quantum core hardware. In this study, we model electron transport in semiconductor qubits based on an advanced CMOS technology. Starting from 3D simulations, we demonstrate an order reduction and the steps necessary to obtain ordinary differential equations on probability amplitudes…
We describe important considerations to create top-down fabricated planar quantum dots in silicon, often not discussed in detail in literature. The subtle interplay between intrinsic material properties, interfaces and fabrication processes plays a crucial role in the formation of electrostatically defined quantum dots. Processes such as oxidation, physical vapor deposition and atomic-layer deposition must be tailored in order to prevent unwanted side effects such as defects, disorder and dewetting. In two directly related manuscripts written in parallel we use techniques described in this wor…
We report electrical measurements of a single arsenic dopant atom in the tunnel-barrier of a silicon SET. As well as performing electrical characterization of the individual dopant, we study series electrical transport through the dopant and SET. We measure the triple points of this hybrid double dot, using simulations to support our results, and show that we can tune the electrostatic coupling between the two sub-systems.
We report on ambipolar gate-defined quantum dots in silicon on insulator (SOI) nanowires fabricated using a customised complementary metal-oxide-semiconductor (CMOS) process. The ambipolarity was achieved by extending a gate over an intrinsic silicon channel to both highly doped n-type and p-type terminals. We utilise the ability to supply ambipolar carrier reservoirs to the silicon channel to demonstrate an ability to reconfigurably define, with the same electrodes, double quantum dots with either holes or electrons. We use gate-based reflectometry to sense the inter-dot charge transition(IDT…
We electrically measure intrinsic silicon quantum dots with electrostatically defined tunnel barriers. The presence of both p-type and n-type ohmic contacts enables the accumulation of either electrons or holes. Thus we are able to study both transport regimes within the same device. We investigate the effect of the tunnel barriers and the electrostatically defined quantum dots. There is greater localisation of charge states under the tunnel barriers in the case of hole conduction leading to higher charge noise in the p-regime.
We study the charge transfer dynamics between a silicon quantum dot and an individual phosphorous donor using the conduction through the quantum dot as a probe for the donor ionization state. We use a silicon n-MOSFET (metal oxide field effect transistor) biased near threshold in the SET regime with two side gates to control both the device conductance and the donor charge. Temperature and magnetic field independent tunneling time is measured. We measure the statistics of the transfer of electrons observed when the ground state D0 of the donor is aligned with the SET states.
We report the demonstration of a low-disorder silicon metal-oxide-semiconductor (Si MOS) quantum dot containing a tunable number of electrons from zero to N=27. The observed evolution of addition energies with parallel magnetic field reveals the spin filling of electrons into valley-orbit states. We find a splitting of 0.10 meV between the ground and first excited states, consistent with theory and placing a lower bound on the valley splitting. Our results provide optimism for the realization in the near future of spin qubits based on silicon quantum dots.
We describe a planar silicon metal-oxide-semiconductor (MOS) based single hole transistor, which is compatible with conventional Si CMOS fabrication. A multi-layer gate design gives independent control of the carrier density in the dot and reservoirs. Clear Coulomb blockade oscillations are observed, and source-drain biasing measurements show that it is possible to deplete the dot down to the few hole regime, with excited states clearly visible. The architecture is sufficiently versatile that a second hole dot could be induced adjacent to the first one.
We integrate ambipolar quantum dots in silicon fin field-effect transistors using exclusively standard complementary metal-oxide-semiconductor fabrication techniques. We realize ambipolarity by replacing conventional highly-doped source and drain electrodes by a metallic nickel silicide with Fermi level close to the silicon mid-gap position. Such devices operate in a dual mode, either as classical field-effect or single-electron transistor. We implement a classical logic NOT gate at low temperature by tuning two interconnected transistors into opposite polarities. In the quantum regime, we dem…
Double quantum dots are convenient solid-state platforms to encode quantum information. Two-electron spin states can be conveniently detected and manipulated using strong quantum selection rules based on the Pauli exclusion principle, leading to the well-know Pauli spin blockade of electron transport for triplet states. Coherent spin states would be optimally preserved in an environment free of nuclear spins, which is achievable in silicon by isotopic purification. Here we report on a deliberately engineered, gate-defined silicon metal-oxide-semiconductor double quantum dot system. The electro…
We present measurements of resonant tunneling through discrete energy levels of a silicon double quantum dot formed in a thin silicon-on-insulator layer. In the absence of piezoelectric phonon coupling, spontaneous phonon emission with deformation-potential coupling accounts for inelastic tunneling through the ground states of the two dots. Such transport measurements enable us to observe a Pauli spin blockade due to effective two-electron spin-triplet correlations, evident in a distinct bias-polarity dependence of resonant tunneling through the ground states. The blockade is lifted by the exc…
We report on low-temperature electronic transport measurements of a silicon metal-oxide-semiconductor quantum dot, with independent gate control of electron densities in the leads and the quantum dot island. This architecture allows the dot energy levels to be probed without affecting the electron density in the leads, and vice versa. Appropriate gate biasing enables the dot occupancy to be reduced to the single-electron level, as evidenced by magnetospectroscopy measurements of the ground state of the first two charge transitions. Independent gate control of the electron reservoirs also enabl…
Fault-tolerant quantum operation is a key requirement for the development of quantum computing. This has been realized in various solid-state systems including isotopically purified silicon which provides a nuclear spin free environment for the qubits, but not in industry standard natural (unpurified) silicon. Here we demonstrate an addressable fault-tolerant qubit using a natural silicon double quantum dot with a micromagnet optimally designed for fast spin control. This optimized design allows us to achieve the optimum Rabi oscillation quality factor Q = 140 at a Rabi frequency of 10 MHz in …
We present data on the electrical transport properties of highly-doped silicon-on-insulator quantum dots under the effect of pulsed magnetic fields up to 48 T. At low field intensities, B<7 T, we observe a strong modification of the conductance due to the destruction of weak localization whereas at higher fields, where the magnetic field length becomes comparable to the effective Bohr radius of phosphorous in silicon, a strong decrease in conductance is demonstrated. Data in the high and low electric field bias regimes are then compared to show that close to the Coulomb blockade edge magnetica…
Electrical transport in double quantum dots (DQDs) illuminates many interesting features of the dots' carrier states. Recent advances in silicon quantum information technologies have renewed interest in the valley states of electrons confined in silicon. Here we show measurements of DC transport through a mesa-etched silicon double quantum dot. Comparing bias triangles (i.e., regions of allowed current in DQDs) at positive and negative bias voltages we find a systematic asymmetry in the size of the bias triangles at the two bias polarities. Asymmetries of this nature are associated with blocki…
We present an experimental study of the fluctuations of Coulomb blockade peak positions of a quantum dot. The dot is defined by patterning the two-dimensional electron gas of a silicon MOSFET structure using stacked gates. This permits variation of the number of electrons on the quantum dot without significant shape distortion. The ratio of charging energy to single particle energy is considerably larger than in comparable GaAs/AlGaAs quantum dots. The statistical distribution of the conductance peak spacings in the Coulomb blockade regime was found to be unimodal and does not follow the Wigne…
We have observed a negative differential conductance with singular gate and source-drain bias dependences in a phosphorus-doped silicon quantum dot. Its origin is discussed within the framework of weak localization. By measuring the current-voltage characteristics at different temperatures as well as simulating the tunneling rates dependences on energy, we demonstrate that the presence of shallow energy defects together with an enhancement of localization satisfactory explain our observations. Effects observed in magnetic fields are also discussed.
Understanding interactions between orbital and valley quantum states in silicon nanodevices is crucial in assessing the prospects of spin-based qubits. We study the energy spectra of a few-electron silicon metal-oxide-semiconductor quantum dot using dynamic charge sensing and pulsed-voltage spectroscopy. The occupancy of the quantum dot is probed down to the single-electron level using a nearby single-electron transistor as a charge sensor. The energy of the first orbital excited state is found to decrease rapidly as the electron occupancy increases from N=1 to 4. By monitoring the sequential …
A few-electron double quantum dot was fabricated using metal-oxide-semiconductor(MOS)-compatible technology and low-temperature transport measurements were performed to study the energy spectrum of the device. The double dot structure is electrically tunable, enabling the inter-dot coupling to be adjusted over a wide range, as observed in the charge stability diagram. Resonant single-electron tunneling through ground and excited states of the double dot was clearly observed in bias spectroscopy measurements.
The bandstructure of bulk silicon has a six-fold valley degeneracy. Strain in the Si/SiGe quantum well system partially lifts the valley degeneracy, but the materials factors that set the splitting of the two lowest lying valleys are still under intense investigation. We propose a method for accurately determining the valley splitting in Si/SiGe double quantum dots embedded into a superconducting microwave resonator. We show that low lying valley states in the double quantum dot energy level spectrum lead to readily observable features in the cavity transmission. These features generate a "fin…
