Finite-state reasoning, the ability to understand and implement state-dependent behavior, is central to hardware design. In this paper, we present LLM-FSM, a benchmark that evaluates how well large language models (LLMs) can recover finite-state machine (FSM) behavior from natural-language specifications and translate it into correct register transfer-level (RTL) implementations. Unlike prior specification-to-RTL benchmarks that rely on manually constructed examples, LLM-FSM is built through a fully automated pipeline. LLM-FSM first constructs FSM with configurable state counts and constrained transition structures. It then prompts LLMs to express each FSM in a structured YAML format with an application context, and to further convert that YAML into a natural-language (NL) specification. From the same YAML, our pipeline synthesizes the reference RTL and testbench in a correct-by-construction manner. All 1,000 problems are verified using LLM-based and SAT-solver-based checks, with human review on a subset. Our experiments show that even the strongest LLMs exhibit sharply declining accuracy as FSM complexity increases. We further demonstrate that training-time scaling via supervised fine-tuning (SFT) generalizes effectively to out-of-distribution (OOD) tasks, while increasing test-time compute improves reasoning reliability. Finally, LLM-FSM remains extensible by allowing its FSM complexity to scale with future model capabilities.
SG-FSM: A Self-Guiding Zero-Shot Prompting Paradigm for Multi-Hop Question Answering Based on Finite State Machine
International Digital Economy Academy（国际数字经济学院）；School of Software & Microelectronics, Peking University（北京大学软件与微电子学院）；National Key Laboratory for Multimedia Information Processing（多媒体信息处理国家重点实验室）；School of Computer Science, Peking University（北京大学计算机学院）；Data Science and Artificial Intelligence, Monash University（莫纳什大学数据科学与人工智能学院）；ModelTC
RTLC -- Research, Teach-to-Learn, Critique: A three-stage prompting paradigm inspired by the Feynman Learning Technique that lifts LLM-as-judge accuracy on JudgeBench with no fine-tuning
SecureRAG-RTL: A Retrieval-Augmented, Multi-Agent, Zero-Shot LLM-Driven Framework for Hardware Vulnerability Detection
School of Computing, Wichita State University（计算机科学学院，威斯康星州立大学）；Department of Electrical and Computer Engineering, Auburn University（电气与计算机工程系，阿伯茨兰大学）；IBM
GRPO with State Mutations: Improving LLM-Based Hardware Test Plan Generation
Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA（麻省理工学院电子工程与计算机科学系）；NVIDIA Research, Austin, TX（NVIDIA研究部）；NVIDIA Research, Taiwan（NVIDIA台湾研究部）；NVIDIA Research, Santa Clara, CA（NVIDIA圣克拉拉研究部）
EvolVE: Evolutionary Search for LLM-based Verilog Generation and Optimization
Department of Electrical Engineering（电气工程系）；National Taiwan University（国立台湾大学）；Department of Computer Science and Information Engineering（计算机科学与信息工程系）；Institute of Information Science（信息科学研究所）
ChiseLLM: Unleashing the Power of Reasoning LLMs for Chisel Agile Hardware Development
Computer Department National University of Defense Technology（国防科技大学计算机系）；School of Computer & Communication Engineering University of Science and Technology Beijing（北京科技大学计算机与通信工程学院）；Intelligent Microelectronics Center Qiyuan Lab（智能微电子中心启元实验室）；College of Computer Science and Technology National University of Defense Technology（国防科技大学计算机科学与技术学院）；Defense Innovation Institute Academy of Military Science（军事科学创新院）
PlaceReasoner-Beta: Reasoning-Driven Macro Placement and Benchmarking
The George Washington University（乔治·华盛顿大学）；University of California, Los Angeles（加州大学洛杉矶分校）；Brown University（布朗大学）；Brookhaven National Laboratory（布鲁克海文国家实验室）；NVIDIA Corp（英伟达公司）；UT Austin（德克萨斯大学奥斯汀分校）
ChatSVA: Bridging SVA Generation for Hardware Verification via Task-Specific LLMs
National ASIC Center, School of Integrated Circuits, Southeast University, China（国家集成电路中心，东南大学集成电路学院，中国）；National Center of Technology Innovation for Electronic Design Automation, China（电子设计自动化技术创新国家中心，中国）；Department of Computer Science, City University of Hong Kong, Hong Kong, China（计算机科学系，香港城市大学，香港，中国）
GoGoTB: Agentic RTL Verification with Specification-Grounded Coverage Closure
Tencent（腾讯）；School of Integrated Circuits, Peking University（北京大学集成电路学院）；Southwest Jiaotong University（西南交通大学）；Institute of Electronic Design Automation, Peking University（北京大学电子设计自动化研究所）；Beijing Advanced Innovation Center for Integrated Circuits（北京集成电路高精尖创新中心）
LEGO: An LLM Skill-Based Front-End Design Generation Platform
School of IC, Peking University（北京大学集成电路学院）；School of EECS, Peking University（北京大学电子信息技术学院）；School of Microelectronics, Xidian University（西安电子科技大学微电子学院）；Institute of EDA, Peking University（北京大学EDA研究院）；Beijing Advanced Innovation Center for IC（北京集成电路先进创新中心）
QUITE: A Query Rewrite System Beyond Rules with LLM Agents
Sichuan University（四川大学）；Cornell University（康奈尔大学）；Purdue University（普渡大学）；Hong Kong University of Science and Technology（香港科学与技术大学）；Computer Network Information Center, Chinese Academy of Sciences（中国科学院计算机网络信息中心）
