arXivDaily arXiv每日学术速递 周一至周五更新
arXiv 2508.05266cs.ARcs.CLcs.LG

理解并缓解LLM生成的RTL代码错误

Understanding and Mitigating Errors of LLM-Generated RTL Code

Jiazheng Zhang, Cheng Liu, Long Cheng, Xiaowei Li, Huawei Li

AI总结:

本文提出基于LLM的框架,通过检索增强生成、规则检查、多模态转换和迭代仿真调试,显著提升了RTL代码生成的准确性。

摘要:

尽管在基于大型语言模型(LLM)的寄存器传输级(RTL)代码生成方面取得有限成功,但错误的根本原因仍缺乏深入理解。为此,我们进行了全面的错误分析,发现大多数失败并非源于推理不足,而是由于缺乏RTL编程知识、电路理解不足、规范模糊或多模态输入的误解。利用上下文学习,我们提出针对性的纠正技术:一个检索增强生成(RAG)知识库以提供领域专业知识;设计描述规则与规则检查以澄清输入;外部工具将多模态数据转换为LLM兼容格式;以及用于剩余错误的迭代仿真调试循环。将这些整合到基于LLM的框架中,实现了显著提升,在VerilogEval基准测试中使用DeepSeek-v3.2-Speciale达到98.1%的准确率,证明了我们方法的有效性。

英文摘要:

Despite limited success in large language model (LLM)-based register-transfer-level (RTL) code generation, the root causes of errors remain poorly understood. To address this, we conduct a comprehensive error analysis, finding that most failures arise not from deficient reasoning, but from a lack of RTL programming knowledge, insufficient circuit understanding, ambiguous specifications, or misinterpreted multimodal inputs. Leveraging in-context learning, we propose targeted correction techniques: a retrieval-augmented generation (RAG) knowledge base to supply domain expertise; design description rules with rule-checking to clarify inputs; external tools to convert multimodal data into LLM-compatible formats; and an iterative simulation-debugging loop for remaining errors. Integrating these into an LLM-based framework yields significant improvement, achieving 98.1% accuracy on the VerilogEval benchmark with DeepSeek-v3.2-Speciale, demonstrating the effectiveness of our approach.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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