arXiv 2407.089302024-07-12quant-phcs.DScs.ET

硬件设备上多量子线路的资源感知调度

Resource-aware scheduling of multiple quantum circuits on a hardware device

Debasmita Bhoumik, Ritajit Majumdar, Susmita Sur-Kolay

备注：: 18 pages, single column

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AI总结：

针对量子硬件多线路并行调度的布局质量、噪声与资源利用问题，提出整数线性规划方案保保真度与最近邻排布，又因问题NP难提出贪心启发式方法，显著提升27、127量子比特硬件的资源利用率。

摘要：

近期的量子技术与量子纠错码强调，将量子线路映射到给定硬件设备时，需将相互作用的量子比特排布为最近邻（NN）构型，以规避不必要的噪声。在总共有n个量子比特（n<m）的线路运行于含m个量子比特的量子硬件设备时，尽量减少量子比特的浪费同样重要。为防止两条线路间的串扰，其布局之间需要设置缓冲距离。此外，并非所有量子比特及所有双量子比特相互作用的噪声水平都相同。在同一硬件上调度多条线路可能导致部分线路在噪声更高的布局上执行。本文研究了一个优化问题：在为每条线路维持预定义布局质量的前提下，调度尽可能多的线路在硬件上并行执行。我们提出了一种整数线性规划公式，可在保持相互作用量子比特间最近邻排布的同时确保最高保真度。我们的结论得到了涉及多种知名量子线路基准的全面研究的支撑。由于该调度问题被证明是NP难的，我们还提出了一种贪心启发式方法，在量子比特和时间维度上，针对27量子比特和127量子比特硬件设备的利用率分别提升了2倍和3倍。

英文摘要：

Recent quantum technologies and quantum error-correcting codes emphasize the requirement for arranging interacting qubits in a nearest-neighbor (NN) configuration while mapping a quantum circuit onto a given hardware device, in order to avoid undesirable noise. It is equally important to minimize the wastage of qubits in a quantum hardware device with m qubits while running circuits of n qubits in total, with n < m. In order to prevent cross-talk between two circuits, a buffer distance between their layouts is needed. Furthermore, not all the qubits and all the two-qubit interactions are at the same noise-level. Scheduling multiple circuits on the same hardware may create a possibility that some circuits are executed on a noisier layout than the others. In this paper, we consider an optimization problem which schedules as many circuits as possible for execution in parallel on the hardware, while maintaining a pre-defined layout quality for each. An integer linear programming formulation to ensure maximum fidelity while preserving the nearest neighbor arrangement among interacting qubits is presented. Our assertion is supported by comprehensive investigations involving various well-known quantum circuit benchmarks. As this scheduling problem is shown to be NP Hard, we also propose a greedy heuristic method which provides 2x and 3x better utilization for 27-qubit and 127-qubit hardware devices respectively in terms of qubits and time.

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