Motivated by the prospect of a two-dimensional square-lattice geometry for semiconductor spin qubits, we explore the realization of the Parity Architecture with quantum dots (QDs). We present sequences of spin shuttling and quantum gates that implement the Parity Quantum Approximate Optimization Algorithm (QAOA) on a lattice constructed of identical unit cells, such that the circuit depth is always constant. We further develop a detailed error model for a hardware-specific analysis of the Parity Architecture and we estimate the errors during one round of Parity QAOA. The model includes a general description of the shuttling errors as a function of the probability distribution function of the valley splitting, which is the main limitation for the performance. We compare our approach to a superconducting transmon qubit chip and we find that with high-fidelity spin shuttling the performance of the spin qubits is competitive or even exceeds the results of the transmons. Finally, we discuss the possibility of decoding the logical quantum state and of quantum error mitigation. We find that already with near-term spin qubit devices a sufficiently low physical error probability can be expected to reliably perform Parity QAOA with a short depth in a regime where the success probability compares favorably to standard QAOA.
Control of entanglement between qubits at distant quantum processors using a two-qubit gate is an essential function of a scalable, modular implementation of quantum computation. Among the many qubit platforms, spin qubits in silicon quantum dots are promising for large-scale integration along with their nanofabrication capability. However, linking distant silicon quantum processors is challenging as two-qubit gates in spin qubits typically utilize short-range exchange coupling, which is only effective between nearest-neighbor quantum dots. Here we demonstrate a two-qubit gate between spin qub…
Quantum error correction requires the detection of errors by reliable measurements of suitable multi-qubit correlation operators. Here, we experimentally demonstrate a fault-tolerant weight-4 parity check measurement scheme. An additional 'flag' qubit serves to detect errors occurring throughout the parity measurement, which would otherwise proliferate into uncorrectable weight-2 errors on the qubit register. We achieve a flag-conditioned parity measurement single-shot fidelity of 93.2(2)\%. Deliberately injecting bit and phase-flip errors, we show that the fault-tolerant protocol is capable o…
Performance of the spin qubit shuttling architecture for a surface code implementation
RWTH Aachen University（亚琛工业大学）；Institute for Quantum Information, RWTH Aachen University（亚琛工业大学量子信息研究所）；Forschungszentrum Jülich（于利希研究中心）；Institute for Theoretical Nanoelectronics (PGI-2), Forschungszentrum Jülich（于利希研究中心理论纳米电子学研究所（PGI-2））；JARA-FIT Institute for Quantum Information, Forschungszentrum Jülich GmbH and RWTH Aachen University（于利希有限公司和亚琛大学JARA-FIT量子信息研究所）；ARQUE Systems GmbH（ARQUE系统有限公司）
The observation of genuine quantum effects in systems governed by non-Hermitian Hamiltonians has been an outstanding challenge in the field. Here we simulate the evolution under such Hamiltonians in the quantum regime on a superconducting quantum processor by using a dilation procedure involving an ancillary qubit. We observe the parity-time ($\mathcal{PT}$)-symmetry breaking phase transition at the exceptional points, obtain the critical exponent, and show that this transition is associated with a loss of state distinguishability. In a two-qubit setting, we show that the entanglement can be m…
QuTech and Kavli Institute of Nanoscience, Delft University of Technology（代尔夫特理工大学奎克研究所和卡弗里纳米科学研究所）；Instituto de Ciencia de Materiales de Madrid ICMM, CSIC（马德里材料科学研究所）；Netherlands Organization for Applied Scientific Research (TNO)（荷兰应用科学研究组织）；Institute of Physics, University of Augsburg（奥格斯堡大学物理研究所）；Quantum Advanced Research Center (QuARC), CSIC（量子先进研究中心）
Shuttling of single electrons in gate-defined silicon quantum dots is numerically simulated. A minimal gate geometry without explicit tunnel barrier gates is introduced, and used to define a chain of accumulation mode quantum dots, each controlled by a single gate voltage. One-dimensional potentials are derived from a three-dimensional electrostatic model, and used to construct an effective Hamiltonian for efficient simulation. Control pulse sequences are designed by maintaining a fixed adiabaticity, so that different shuttling conditions can be systematically compared. We first use these tool…
Large-scale quantum computers will require quantum gate operations between widely separated qubits. A method for implementing such operations, known as quantum gate teleportation (QGT), requires only local operations, classical communication, and shared entanglement. We demonstrate QGT in a scalable architecture by deterministically teleporting a controlled-NOT (CNOT) gate between two qubits in spatially separated locations in an ion trap. The entanglement fidelity of our teleported CNOT is in the interval [0.845, 0.872] at the 95% confidence level. The implementation combines ion shuttling wi…
A design for a large-scale surface code quantum processor based on a node/network approach is introduced for semiconductor quantum dot spin qubits. The minimal node contains only 7 quantum dots, and nodes are separated on the micron scale, creating useful space for wiring interconnects and integration of conventional transistor circuits. Entanglement is distributed between neighbouring nodes by loading spin singlets locally and then shuttling one member of the pair through a linear array of empty dots. Each node contains one data qubit, two ancilla qubits, and additional dots to facilitate ele…
Optimizing Atom Transport, Gate-Count and Depth with Parity Twine
Parity Quantum Computing Germany GmbH（Parity量子计算德国有限公司）；Parity Quantum Computing GmbH（Parity量子计算有限公司）；Institute for Theoretical Physics, University of Innsbruck（因斯布鲁克大学理论物理研究所）
Nearest-neighbour gates are all you need: High-rate quantum low-density parity-check codes on a planar grid
Dahlem Center for Complex Quantum Systems, Freie Universität Berlin（达勒姆复杂量子系统中心，柏林自由大学）；Quantum Software Lab, The University of Edinburgh（爱丁堡大学量子软件实验室）；IQM Quantum Computers（IQM量子计算机公司）；Institute of Mathematics, Johannes Gutenberg-Universität Mainz（美因茨约翰内斯·古腾堡大学数学研究所）；Helmholtz-Zentrum Berlin für Materialien und Energie（柏林亥姆霍兹材料与能源中心）
Inspired by the challenge of scaling up existing silicon quantum hardware, we investigate compilation strategies for sparsely-connected 2d qubit arrangements and propose a spin-qubit architecture with minimal compilation overhead. Our architecture is based on silicon nanowire split-gate transistors which can form finite 1d chains of spin-qubits and allow the execution of two-qubit operations such as Swap gates among neighbors. Adding to this, we describe a novel silicon junction which can couple up to four nanowires into 2d arrangements via spin shuttling and Swap operations. Given these hardw…
Protecting quantum information from errors is essential for large-scale quantum computation. Quantum error correction (QEC) encodes information in entangled states of many qubits, and performs parity measurements to identify errors without destroying the encoded information. However, traditional QEC cannot handle leakage from the qubit computational space. Leakage affects leading experimental platforms, based on trapped ions and superconducting circuits, which use effective qubits within many-level physical systems. We investigate how two-transmon entangled states evolve under repeated parity …
Mechanical resonators are emerging as an important new platform for quantum science and technologies. A large number of proposals for using them to store, process, and transduce quantum information motivates the development of increasingly sophisticated techniques for controlling mechanical motion in the quantum regime. By interfacing mechanical resonators with superconducting circuits, circuit quantum acoustodynamics (cQAD) can make a variety of important tools available for manipulating and measuring motional quantum states. Here we demonstrate direct measurements of the phonon number distri…
Error correcting codes use multi-qubit measurements to realize fault-tolerant quantum logic steps. In fact, the resources needed to scale-up fault-tolerant quantum computing hardware are largely set by this task. Tailoring next-generation processors for joint measurements, therefore, could result in improvements to speed, accuracy, or cost -- accelerating the development large-scale quantum computers. Here, we motivate such explorations by analyzing an unconventional surface code based on multi-body interactions between superconducting transmon qubits. Our central consideration, Hardware Optim…
