A topological quantum field effect transistor (TQFET) uses electric field to switch a material from topological insulator ("on", with conducting edge states) to a conventional insulator ("off"), and can have low subthreshold swing due to strong Rashba spin-orbit interaction. Numerous materials have been proposed, and electric field switching has been demonstrated in ultrathin Na${_3}$Bi. Here we propose a negative capacitance (NC) TQFET which uses a ferroelectric to amplify the electric field and potentially achieve very low switching voltages and energies. Materials challenges for realizing the NC-TQFET are discussed.
In 2008, Salahuddin and Datta proposed that a ferroelectric material operating in the negative capacitance region could act as a step-up converter of the surface potential in a MOS structure, opening a new route for the realization of transistors with steeper subthreshold characteristics (S<60 mV/decade). In this letter, a comprehensive physics-based surface potential and drain current model for the negative capacitance field-effect transistor is reported. The model is aimed to evaluate the potentiality of such transistors for low-power switching applications. Moreover it provides a model core…
Negative capacitance (NC) in ferroelectrics, which stems from the imperfect screening of polarization, is considered a viable approach to lower voltage operation in the field-effect transistors (FETs) used in logic switches. In this paper, we discuss the implications of the transient nature of negative capacitance for its practical application. It is suggested that the NC effect needs to be characterized at the proper time scale to identify the type of circuits where functional NC-FETs can be used effectively.
We have incorporated an aluminum single electron transistor (SET) directly on top of a vertical quantum dot, enabling the use of the SET as an electrometer that is extremely responsive to the motion of charge into and out of the dot. Charge induced on the SET central island from single electron additions to the dot modulates the SET output, and we describe two methods for demodulation that permit quantitative extraction of the quantum dot capacitance signal. The two methods produce closely similar results for the determined single electron capacitance peaks.
I present a compact physics-based model of the drain current, charge and capacitance of graphene field-effect transistors, of relevance for exploration of DC, AC and transient behavior of graphene based circuits. The physical framework is a field-effect model and drift-diffusion carrier transport incorporating saturation velocity effects. First, an explicit model has been derived for the drain current. Using it as a basis, explicit closed-form expressions for the charge and capacitances based on the Ward-Dutton partition scheme, covering continuosly all operation regions. The model is of speci…
A small-signal equivalent circuit of 2D-material based field-effect transistors is presented. Charge conservation and non-reciprocal capacitances have been assumed so the model can be used to make reliable predictions at both device and circuit levels. In this context, explicit and exact analytical expressions of the main radio-frequency figures of merit of these devices are given. Moreover, a direct parameter extraction methodology is provided based on S-parameter measurements. In addition to the intrinsic capacitances, transconductance and output conductance, our approach allows extracting t…
We study theoretically an influence of the near-interfacial insulator traps and electron-hole puddles on the small-signal capacitance and conductance characteristics of the gated graphene structures. Based on the self-consistent electrostatic consideration and taking into account the interface trap capacitance the explicit analytic expressions for charge carrier density and the quantum capacitance as functions of the gate voltage were obtained. This allows to extract the interface trap capacitance and density of interface states from the gate capacitance measurements. It has shown that self-co…
Starting from the Kubo formula for conductance, we calculate the frequency-dependent response of a single-electron transistor (SET) driven by an ac signal. Treating tunneling processes within the lowest order approximation, valid for a wide range of parameters, we discover a finite reactive part even under Coulomb blockade due to virtual processes. At low frequencies this can be described by an effective capacitance. This effect can be probed with microwave reflection measurements in radio-frequency (rf) SET provided that the capacitance of the surroundings does not completely mask that of the…
The analytical model of the small-signal current and capacitance characteristics of RF graphene FET is presented. The model is based on explicit distributions of chemical potential in graphene channels (including ambipolar conductivity at high source-drain bias) obtained in the framework of drift-diffusion current continuity equation solution. Small-signal transconductance and output conductance characteristics are modeled taking into account the two modes of drain current saturation including drift velocity saturation or electrostatic pinch-off. Analytical closed expression for the complex cu…
We present a circuit-compatible compact model of the intrinsic capacitances of graphene field-effect transistors (GFETs). Together with a compact drain current model, a large-signal model of GFETs is developed combining both models as a tool for simulating the electrical behavior of graphene-based integrated circuits, dealing with the DC, transient behavior, and frequency response of the circuit. The drain current model is based in a drift-diffusion mechanism for the carrier transport coupled with an appropriate field-effect approach. The intrinsic capacitance model consists of a 16-capacitanc…
Integrating ferroelectric negative capacitance (NC) into the field-effect transistor (FET) promises to break fundamental limits of power dissipation known as Boltzmann tyranny. However, realizing the stable static negative capacitance in the non-transient non-hysteretic regime remains a daunting task. The problem stems from the lack of understanding of how the fundamental origin of the NC due to the emergence of the domain state can be put in use for implementing the NC FET. Here we put forth an ingenious design for the ferroelectric domain-based field-effect transistor with the stable reversi…
An evaluation of the gate capacitance of a field-effect transitor (FET) whose channel length and width are several ten nanometer, is a key point for sensors applications. However, experimental and precise evaluation of capacitance in the aF range or less has been extremely difficult. Here, we report an extraction of the capacitance down to 0.55 aF for a silicon FET with a nanoscale wire channel whose width and length are 15 and 50 nm, respectively. The extraction can be achieved by using a combination of four kinds of measurements: current characteristics modulated by double gates, random-tele…
Atomistic density functional theory (DFT) calculations of the capacitance between a metallic cylindric gate and a carbon nanotube (CNT) are reported. Results stressing the predominant effect of quantum capacitance in limiting or even enhancing screening properties of the CNT are shown. Other contributions to the quantum capacitance beyond the electronic density of state (DOS) are pointed out. Negative values of the quantum capacitance are obtained for low-density systems, which correspondingly over-screen the gate field. This unconventional behavior of the quantum capacitance is related to the…
A Metal-dielectric-topological insulator capacitor device based on hBN-encapsulated CVD grown Bi2Se3 is realized and investigated in the radio frequency regime. The RF quantum capacitance and device resistance are extracted for frequencies as a high as 10 GHz, and studied as a function of the applied gate voltage. The combination of the superior quality hBN dielectric gate with the optimized transport characteristics of CVD grown Bi2Se3 (n~10^18cm-3 in 8 nm) allow us to attain a bulk depleted regime by dielectric gating. A quantum capacitance minimum is observed revealing a purely Dirac regime…
We have used a superconducting single-electron transistor as a DC-electrometer that is strongly coupled to the metal island of another transistor. With this set-up, it is possible to directly measure the charge distribution on this island. The strong capacitive coupling was achieved by a multilayer fabrication technique that allowed us to make the coupling capacitance bigger than the junction capacitances. Simulations of this system were done using orthodox theory of single-electron tunnelling and showed excellent agreement with the measurements.
We have decomposed the modeling of the field-effect transistors into the two independent parts: the current continuity based kinetics and the charge neutrality based electrostatics. The former part, that is universal for all FETs, leads to an explicit and closed form of I-V characteristics as a function of the total channel charge. The latter part, which is specific for a particular material and geometric configurations can be considered as an independent engineering task. The quantum capacitance and the interface trap density are consistently incorporated into the solution of the current cont…
We report on microwave operation of top-gated single carbon nanotube transistors. From transmission measurements in the 0.1-1.6 GHz range, we deduce device transconductance gm and gate-nanotube capacitance Cg of micro- and nanometric devices. A large and frequency-independent gm of about 20 microSiemens is observed on short devices, which meets the best dc results. The capacitance per unit gate length of 60 aF/micrometer is typical of top gates on a conventional oxide with a dielectric constant equal to 10. This value is a factor of 3-5 below the nanotube quantum capacitance which, according t…
The field-effect mobility of graphene devices is discussed. We argue that the graphene ballistic mean free path can only be extracted by taking into account both, the electrical characteristics and the channel length dependent mobility. In doing so we find a ballistic mean free path of 300nm at room-temperature for a carrier concentration of ~1e12/cm2 and that a substantial series resistance of around 300ohmum has to be taken into account. Furthermore, we demonstrate first quantum capacitance measurements on single-layer graphene devices.
Physical phenomena underlying operation of ferroelectric field-effect transistors (FeFETs) is treated within a unified simulation framework. The framework incorporates the Landau mean-field treatment of free energy of a ferroelectric and the polarization dynamics according to Landau-Khalatnikov (LK) equation. These equations are self-consistently solved with the one-dimensional metal-oxide-semiconductor (MOS) structure electrostatics and the drift-diffusion solution for the current in the semiconductor channel. Numerical simulations demonstrate, depending on the ferroelectric (FE) thickness, b…
This work explores the consequences of introducing a piezoelectric gate barrier in a normal field-effect transistor. Because of the positive feedback of strain and piezoelectric charge, internal charge amplification occurs in such an electromechanical capacitor resulting in a negative capacitance. The first consequence of this amplification is a boost in the on-current of the transistor. As a second consequence, employing the Lagrangian method, we find that by using the negative capacitance of a highly compliant piezoelectric barrier, one can potentially reduce the subthreshold slope of a tran…
We presents a data-calibrated compact model of carbon nanotube (CNT) field-effect transistors (CNFETs) based on the virtual-source (VS) approach, describing the intrinsic current-voltage and charge-voltage characteristics. The features of the model include: (i) carrier VS velocity extracted from experimental devices with gate lengths down to 15 nm; (ii) carrier effective mobility and velocity depending on the CNT diameter; (iii) short channel effect such as inverse subthreshold slope degradation and drain-induced barrier lowering depending on the device dimensions; (iv) small-signal capacitanc…
When transistor gate insulators have nanometer-scale equivalent oxide thickness (EOT), the gate capacitance ($C_\textrm{G}$) becomes smaller than the oxide capacitance ($C_\textrm{ox}$) due to the quantum capacitance and charge centroid capacitance of the channel. Here, we study the capacitance of monolayer MoS$_\textrm{2}$ as a prototypical two-dimensional (2D) channel while considering spatial variations in the potential, charge density, and density of states. At 0.5 nm EOT, the monolayer MoS$_\textrm{2}$ capacitance is smaller than its quantum capacitance, limiting the single-gated $C_\text…
We have fabricated a Cooper-pair transistor (CPT) with parameters such that for appropriate voltage biases, the sub-gap charge transport takes place via slow tunneling of quasiparticles that link two Josephson-coupled charge manifolds. In between the quasiparticle tunneling events, the CPT behaves essentially like a single Cooper-pair box (SCB). The effective capacitance of a SCB can be defined as the derivative of the induced charge with respect to gate voltage. This capacitance has two parts, the geometric capacitance, C_geom, and the quantum capacitance C_Q. The latter is due to the level a…
The elegant simplicity of the device concept and the urgent need for a new "transistor" at the twilight of Moore's law have inspired many researchers in industry and academia to explore the physics and technology of negative capacitance field effect transistor (NC-FET). Although hundreds of papers have been published, the validity of quasi-static NC and the frequency-reliability limits of NC-FET are still being debated. The concept of NC - if conclusively demonstrated - will have broad impacts on device physics and technology development. Here, the authors provide a critical review of recent p…
The so-called Boltzmann Tyranny defines the fundamental thermionic limit of the subthreshold slope (SS) of a metal-oxide-semiconductor field-effect transistor (MOSFET) at 60 mV/dec at room temperature and, therefore, precludes the lowering of the supply voltage and the overall power consumption. Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this fundamental barrier. Meanwhile, two-dimensional (2D) semiconductors, such as atomically thin transition metal dichalcogenides (TMDs) due to their low dielectric constant, and ease of…
We have measured both the current-voltage ($I_\mathrm{SD}$-$V_\mathrm{GS}$) and capacitance-voltage ($C$-$V_\mathrm{GS}$) characteristics of a $\mathrm{MoS_2-LiNbO_3}$ field effect transistor. From the measured capacitance we calculate the electron surface density and show that its gate voltage dependence follows the theoretical prediction resulting from the two-dimensional free electron model. This model allows us to fit the measured $I_\mathrm{SD}$-$V_\mathrm{GS}$ characteristics over the \emph{entire range} of $V_\mathrm{GS}$. Combining this experimental result with the measured current-vol…
Steep-slope $β$-Ga$_2$O$_3$ nano-membrane negative capacitance field-effect transistors (NC-FETs) are demonstrated with ferroelectric hafnium zirconium oxide in gate dielectric stack. Subthreshold slope less than 60 mV/dec at room temperature is obtained for both forward and reverse gate voltage sweeps with a minimum value of 34.3 mV/dec at reverse gate voltage sweep and 53.1 mV/dec at forward gate voltage sweep at $V_{DS}$=0.5 V. Enhancement-mode operation with threshold voltage ~0.4 V is achieved by tuning the thickness of $β$-Ga$_2$O$_3$ membrane. Low hysteresis of less than 0.1 V is obtain…
We show simultaneous p and n type carrier injection in bilayer graphene channel by varying the longitudinal bias across the channel and the top gate voltage. The top gate is applied electrochemically using solid polymer electrolyte and the gate capacitance is measured to be 1.5 $μF/cm^2$, a value about 125 times higher than the conventional SiO$_2$ back gate capacitance. Unlike the single layer graphene, the drain-source current does not saturate on varying the drain-source bias voltage. The energy gap opened between the valence and conduction bands using top and back gate geometry is estimate…
In this letter, we describe operation of a radio-frequency superconducting single electron transistor (RF-SSET) with an on-chip superconducting LC matching network consisting of a spiral inductor L and its capacitance to ground. The superconducting network has a lower parasitic capacitance and gives a better matching for the RF-SSET than does a commercial chip inductor. Moreover, the superconducting network has negligibly low dissipation, leading to sensitive response to changes in the RF-SSET impedance. The charge sensitivity 2.4*10^-6 e/(Hz)^1/2 in the sub-gap region and energy sensitivity o…
High frequency performance limits of graphene field-effect transistors (FETs) down to a channel length of 20nm are examined by using self-consistent quantum simulations. The results indicate that although Klein band-to-band tunneling is significant for sub-100nm graphene FET, it is possible to achieve a good transconductance and ballistic on-off ratio larger than 3 even at a channel length of 20nm. At a channel length of 20nm, the intrinsic cut-off frequency remains at a couple of THz for various gate insulator thickness values, but a thin gate insulator is necessary for a good transconductanc…
We report a comprehensive micro-Raman scattering study of electrochemically-gated graphene field-effect transistors. The geometrical capacitance of the electrochemical top-gates is accurately determined from dual-gated Raman measurements, allowing a quantitative analysis of the frequency, linewidth and integrated intensity of the main Raman features of graphene. The anomalous behavior observed for the G-mode phonon is in very good agreement with theoretical predictions and provides a measurement of the electron-phonon coupling constant for zone-center ($Γ$ point) optical phonons. In addition, …
We analyze the distributions of electric potential and field, polarization and charge, and the differential capacitance of a silicon metal-oxide-ferroelectric field effect transistor (MOSFET), in which a gate insulator consists of thin layers of dielectric SiO2 and weak ferroelectric HfO2. It appeared possible to achieve a quasi-steady-state negative capacitance of the HfO2 layer, C_(HfO_2 )<0, if the layer thickness is close to the critical thickness of the size-induced ferroelectric-paraelectric phase transition. The quasi-steady-state negative capacitance, being a very slow-varying transien…
We report on measurements of the quantum capacitance in graphene as a function of charge carrier density. A resonant LC-circuit giving high sensitivity to small capacitance changes is employed. The density of states, which is directly proportional to the quantum capacitance, is found to be significantly larger than zero at and around the charge neutrality point. This finding is interpreted to be a result of potential fluctuations with amplitudes of the order of 100 meV in good agreement with scanning single-electron transistor measurements on bulk graphene and transport studies on nanoribbons.
Understanding the origin of hysteresis in the channel resistance from top gated graphene transistors is important for transistor applications. Capacitance - voltage measurements across the gate oxide on top gated bilayer graphene show hysteresis with a charging and discharging time constant of ~100 μs. However, the measured capacitance across the graphene channel does not show any hysteresis, but shows an abrupt jump at a high channel voltage due to the emergence of an order, indicating that the origin of hysteresis between gate and source is due to charge traps present in the gate oxide and g…
In this letter, we analyze the carrier transit delay in graphene field-effect transistors (GFETs). GFETs are fabricated at the wafer-scale on sapphire substrate. For a device with a gate length of 210 nm, a current gain cut-off frequency fT of 18 GHz and 22 GHz is obtained before and after de-embedding. The extraction of the internal (Cgs,i, Cgd,i) and external capacitances (Cgs,ex and Cgd,ex) from the scaling behavior of the gate capacitances Cgs and Cgd allows the intrinsic (τ_int), extrinsic (τ_ext) and parasitic delays (τ_par) to be obtained. In addition, the extraction of the intrinsic de…
Capacitance-voltage (C-V) characteristics are important for understanding fundamental electronic structures and device applications of nanomaterials. The C-V characteristics of graphene nanoribbons (GNRs) are examined using self-consistent atomistic simulations. The results indicate strong dependence of the GNR C-V characteristics on the edge shape. For zigzag edge GNRs, highly non-uniform charge distribution in the transverse direction due to edge states lowers the gate capacitance considerably, and the self-consistent electrostatic potential significantly alters the band structure and carrie…
We propose a practical realization of a field-effect transistor for phonons. Our device is based on a single ionic polymeric molecule and it gives modulations as large as -25% in the thermal conductance for feasible temperatures and electric field magnitudes. Such effect can be achieved by reversibly switching the acoustic torsion mode into an optical mode through the coupling of an applied electric field to the dipole moments of the monomers. This device can pave the way to the future development of phononics at the nanoscale or molecular scale.
We have made a detailed proposal for a two-channel quantum dot setup. The energy scales in the problem are such that we are able to make connection with the two-channel Anderson model, which, in spite of being well-known in the context of heavy-Fermion systems remained theoretically elusive until recently and lacked a mesoscopic realization. Verification of our precise and robust predictions for the differential capacitance lineshape of the dot will provide an experimental signature of the two-channel behavior.
A novel bipolar transistor structure, namely, a SiC emitter lateral NPM Schottky collector bipolar transistor (SCBT) with a silicon-on-insulator (SOI) substrate is explored using two-dimensional (2-D) simulation. A comprehensive comparison of the proposed structure with its equivalent Si lateral NPN BJT and an SiC emitter lateral NPN HBT is presented. Based on simulation results, the authors demonstrate for the first time that the proposed SiC emitter lateral NPM transistor shows superior performance in terms of high current gain and cut-off frequency, reduced collector resistance, negligible …
Negative capacitance field-effect transistors (NC-FETs) have attracted wide interest as promising candidates for steep-slope devices, and sub-60 mV/decade switching has been demonstrated in NC-FETs with various device structures and material systems. However, the detailed mechanisms of the observed steep-slope switching in some of these experiments are under intense debate. Here we show that sub-60 mV/decade switching can be observed in a WS2 transistor with a metal-insulator-metal-insulator-semiconductor (MIMIS) structure - without any ferroelectric component. This structure resembles an NC-F…
A physics-based model for the surface potential and drain current for monolayer transition metal dichalcogenide (TMD) field-effect transistor (FET) is presented. Taking into account the 2D density-of-states of the atomic layer thick TMD and its impact on the quantum capacitance, a model for the surface potential is presented. Next, considering a drift-diffusion mechanism for the carrier transport along the monolayer TMD, an explicit expression for the drain current has been derived. The model has been benchmarked with a measured prototype transistor. Based on the proposed model, the device des…
We propose a set-up to realize two-channel Kondo physics using quantum dots. We discuss how the charge fluctuations on a small dot can be accessed by using a system of two single electron transistors arranged in parallel. We derive a microscopic Hamiltonian description of the set-up that allows us to make connection with the two-channel Anderson model (of extended use in the context of heavy-Fermion systems) and in turn make detailed predictions for the differential capacitance of the dot. We find that its lineshape, which we determined precisely, shows a robust behavior that should be experim…
Using 2-D self-consistent ballistic quantum transport simulations, we investigate the short-channel behavior of graphene field-effect transistors and its impact on the device transconductance and subsequently the intrinsic cut-off frequency (fT). Although with thin oxides, fT expectedly scales inversely with the gate length, significant band-to-band tunneling at OFF state leads to a departure from this trend in case of thick oxides. We also examine the effect of achieving better electrostatics at the cost of increased gate capacitance and illustrate that this can indeed degrade the fT. These c…
A nanoscale variable resistor consisting of a metal nanowire (active element), a dielectric, and a gate, is proposed. By means of the gate voltage, stochastic transitions between different conducting states of the nanowire can be induced, with a switching time as fast as picoseconds. With an appropriate choice of dielectric, the transconductance of the device, which may also be considered an ``electromechanical transistor,'' is shown to significantly exceed the conductance quantum G_0=2e^2/h, a remarkable figure of merit for a nanoscale device.
We present a novel reconfigurable metal-oxide-semiconductor multi-gate transistor that can host a quadruple quantum dot in silicon. The device consist of an industrial quadruple-gate silicon nanowire field-effect transistor. Exploiting the corner effect, we study the versatility of the structure in the single quantum dot and the serial double quantum dot regimes and extract the relevant capacitance parameters. We address the fabrication variability of the quadruple-gate approach which, paired with improved silicon fabrication techniques, makes the corner state quantum dot approach a promising …
Low-capacitance Josephson junction systems as well as coupled quantum dots, in a parameter range where single charges can be controlled, provide physical realizations of quantum bits, discussed in connection with quantum computing. The necessary manipulation of the quantum states can be controlled by applied gate voltages. In addition, the state of the system has to be read out. Here we suggest to measure the quantum state by coupling a single-electron transistor to the q-bit. As long as no transport voltage is applied, the transistor influences the quantum dynamics of the q-bit only weakly. W…
A low complexity computational model of the current-voltage characteristics for graphene nano-ribbon (GNR) field effect transistors (FET), able to simulate a hundred of points in few seconds using a PC, is presented. For quantum capacitance controlled devices, self-consistent calculations of the electrostatic potential can be skipped. Instead, analytical closed-form electrostatic potential from Laplace's equation yields accurate results compared with that obtained by self-consistent Non-Equilibrium Green's Functions (NEGF) method. The model includes both tunnelling current through the Schottky…
We explore the electric-field effect of carbon nanotubes (NTs) in electrolytes. Due to the large gate capacitance, Fermi energy shifts of order +/- 1 V can be induced, enabling to tune NTs from p to n-type. Consequently, large resistance changes are measured. At zero gate voltage the NTs are hole doped in air with E_F ? 0.3-0.5 eV, corresponding to a doping level of ? 10^{13} cm^{-2}. Hole-doping increases in the electrolyte. This hole doping (oxidation) is most likely caused by the adsorption of oxygen in air and cations in the electrolyte.
We use Kelvin Force Microscopy (KFM) to study the electrostatic properties of single-walled Carbon Nanotube Field Effect Transistor devices (CNTFETs) with backgate geometry at room temperature. We show that KFM maps recorded as a function of the device backgate polarization enable a complete phenomenological determination of the averaging effects associated with the KFM probe side capacitances, and thus, to obtain KFM measurements with quantitative character. The value of the electrostatic lever arm of the CNTFET is determined from KFM measurements, and found in agreement with transport measur…
We have suspended an Al based single-electron transistor whose island can resonate freely between the source and drain leads forming the clamps. In addition to the regular side gate, a bottom gate with a larger capacitance to the SET island is placed underneath to increase the SET coupling to mechanical motion. The device can be considered as a doubly clamped Al beam that can transduce mechanical vibrations into variations of the SET current. Our simulations based on the orthodox model, with the SET parameters estimated from the experiment, reproduce the observed transport characteristics in d…
We present theoretical results on far-infrared (FIR) absorption of single-electron transistors. Based on them, we propose and explain how to conduct combined FIR--dc-transport experiments to determine the charging energy and other relevant parameters, without measuring FIR intensities.
Single-walled carbon nanotubes (SWNTs) have been grown via chemical vapor deposition on high-kappa dielectric SrTiO3/Si substrates, and high-performance semiconducting SWNT field-effect transistors have been fabricated using the thin SrTiO3 as gate dielectric and Si as gate electrode. The transconductance per channel width is 8900 S/m. The high transconductance cannot be explained by the increased gate capacitance; it is proposed that the increased electric field at the nanotube-electrode interface due to the high-kappa SrTiO3 decreases or eliminates the nanotube-electrode Schottky barrier.
Large capacitance enhancement is useful for increasing the gate capacitance of field-effect transistors (FETs) to produce low-energy-consuming devices with improved gate controllability. We report strong capacitance enhancement effects in a newly emerged two-dimensional channel material, molybdenum disulfide (MoS2). The enhancement effects are due to strong electron-electron interaction at the low carrier density regime in MoS2. We achieve about 50% capacitance enhancement in monolayer devices and 10% capacitance enhancement in bilayer devices. However, the enhancement effect is not obvious in…
Steep transistors are crucial in lowering power consumption of the integrated circuits. However, the difficulties in achieving steepness beyond the Boltzmann limit experimentally have hindered the fundamental challenges in application of these devices in integrated circuits. From a sensitivity perspective, an ideal switch should have a high sensitivity to the gate voltage and lower sensitivity to the device design parameters like oxide and body thicknesses. In this work, conventional tunnel-FET (TFET) and negative capacitance FET are shown to suffer from high sensitivity to device design param…
We report a novel method to reduce the collector-emitter offset-voltage of the wide bandgap SiC-P-emitter lateral HBTs using a dual-bandgap emitter. In our approach, the collector-emitter offset-voltage VCE(offset) is reduced drastically by eliminating the built-in potential difference between the emitter-base (EB) junction and collector-base (CB) junction by using a SiC-on-Si P-emitter. We demonstrate that the proposed dualbandgap P-emitter HBT together with the SiGe base and Schottky collector, not only has a very low VCE(offset) but also exhibits high current gain, reduced Kirk effect, exce…
Fundamental physical properties limiting the performance of spin field effect transistors are compared to those of ordinary (charge-based) field effect transistors. Instead of raising and lowering a barrier to current flow these spin transistors use static spin-selective barriers and gate control of spin relaxation. The different origins of transistor action lead to distinct size dependences of the power dissipation in these transistors and permit sufficiently small spin-based transistors to surpass the performance of charge-based transistors at room temperature or above. This includes lower t…
Quantum mechanical effects induced by the miniaturization of complementary metal-oxide-semiconductor (CMOS) technology hamper the performance and scalability prospects of field-effect transistors. However, those quantum effects, such as tunnelling and coherence, can be harnessed to use existing CMOS technology for quantum information processing. Here, we report the observation of coherent charge oscillations in a double quantum dot formed in a silicon nanowire transistor detected via its dispersive interaction with a radio-frequency resonant circuit coupled via the gate. Differential capacitan…
