Spin-based metal-oxide-semiconductor field-effect transistors (MOSFET) with a high-mobility III-V channel are studied using self-consistent quantum corrected ensemble Monte Carlo device simulations of charge and spin transport. The simulations including spin-orbit coupling mechanisms (Dresselhaus and Rashba coupling) examine the electron spin transport in the 25 nm gate length In$_{0.7}$Ga$_{0.3}$As MOSFET. The transistor lateral dimensions (the gate length, the source-to-gate, and the gate-to-drain spacers) are increased to investigate the spin-dependent drain current modulation induced by the gate from room temperature of 300 K down to 77 K. This modulation increases with increasing temperature due to increased Rashba coupling. Finally, an increase of up to 20 nm in the gate length, source-to-gate, or the gate-to-drain spacers increases the spin polarization and enhances the spin-dependent drain current modulation at the drain due to polarization-refocusing effects.
These comments aim to correct some apparent weaknesses in the theory of field electron emission given in a recent paper about nanoscale vacuum channel transistors, and to improve the presentation of this theory. In particular, it is argued that a "simplified" formula stated in the paper should not be used, because this formula is known to under-predict emission current densities by a large factor (typically around 300 for an emitting surface with local work function 4.5 eV). Thus, the "simplified" formula may significantly under-predict the practical performance of a nanoscale vacuum channel t…
A nanoscale variable resistor consisting of a metal nanowire (active element), a dielectric, and a gate, is proposed. By means of the gate voltage, stochastic transitions between different conducting states of the nanowire can be induced, with a switching time as fast as picoseconds. With an appropriate choice of dielectric, the transconductance of the device, which may also be considered an ``electromechanical transistor,'' is shown to significantly exceed the conductance quantum G_0=2e^2/h, a remarkable figure of merit for a nanoscale device.
In this letter we discuss how the short channel behavior in sub 100 nm channel range can be improved by inducing a step surface potential profile at the back gate of an asymmetrical double gate (DG) Silicon-On-Insulator (SOI) Metal-Oxide-Semiconductor Field-Effect- Transistor (MOSFET) in which the front gate consists of two materials with different work functions.
A nanoscale device consisting of a metal nanowire, a dielectric, and a gate is proposed. A combination of quantum and thermal stochastic effects enable the device to have multiple functionalities, serving alternately as a transistor, a variable resistor, or a simple resistive element with $I-V$ characteristics that can switch between ohmic and non-ohmic. By manipulating the gate voltage, stochastic transitions between different conducting states of the nanowire can be induced, with a switching time as short as picoseconds. With an appropriate choice of dielectric, the transconductance of the d…
We report an electron-beam based method for the nanoscale patterning of the poly(ethylene oxide)/LiClO$_{4}$ polymer electrolyte. We use the patterned polymer electrolyte as a high capacitance gate dielectric in single nanowire transistors and obtain subthreshold swings comparable to conventional metal/oxide wrap-gated nanowire transistors. Patterning eliminates gate/contact overlap which reduces parasitic effects and enables multiple, independently controllable gates. The method's simplicity broadens the scope for using polymer electrolyte gating in studies of nanowires and other nanoscale de…
We show that by adding only two fitting parameters to a purely ballistic transport model, we can accurately characterize the current-voltage characteristics of nanoscale MOSFETs. The model is an extension to a ballistic model (J. Appl. Phys. 76, 4879 (1994)) and includes transmission probability and the drain-channel coupling capacitor. The latter parameter gives rise to a theoretical RON that is significantly larger than those predicted previously. To validate our model, we fabricated n-channel MOSFETs with varying channel lengths. We show the length dependence of these parameters to support …
We have developed nano-scale double-gated field-effect-transistors for the study of electron states and transport properties of single deliberately-implanted phosphorus donors. The devices provide a high-level of control of key parameters required for potential applications in nanoelectronics. For the donors, we resolve transitions corresponding to two charge states successively occupied by spin down and spin up electrons. The charging energies and the Lande g-factors are consistent with expectations for donors in gated nanostructures.
Tunnel Field Effect Transistors (TFET) have extremely low leakage current, exhibit excellent subthreshold swing and are less susceptible to short channel effects. However, TFETs do face certain special challenges, particularly with respect to the process induced variations in (i) the channel length and (ii) the thickness of the silicon thin-film and the gate oxide. This paper, for the first time, studies the impact of the above process variations on the electrical characteristics of a Double Gate Tunnel Field Effect Transistor (DGTFET). Using two dimensional device simulations, we propose the …
Tunnel field effect transistor (TFET) devices are attractive as they show good scalability and have very low leakage current. However they suffer from low on-current and high threshold voltage. In order to employ the TFET for circuit applications, these problems need to be tackled. In this paper, a novel lateral strained double-gate TFET (SDGTFET) is presented. Using device simulation, we show that the SDGTFET has a higher on-current, low leakage, low threshold voltage, excellent subthreshold slope, and good short channel effects and also meets important ITRS guidelines.
We report a strategy to design nanoscale cold-source field-effect transistors (CS-FETs) with bias-independent sub-60 mV/dec subthreshold swing (SS). By first-principles calculations and quantum-transport simulations, we reveal that the energy alignment of density of states (DOS) between the drain and source electrodes is critical to achieving bias-independent SS. By defining "gate window", we propose a device model to demonstrate how similar slopes of the drain DOS falling into the gate window can stabilize the SS under different bias. This study underscores the significance of drain DOS engin…
We demonstrate a tunnel field effect transistor based on a lateral heterostructure patterned from an $\mathrm{LaAlO_3/SrTiO_3}$ electron gas. Charge is injected by tunneling from the $\mathrm{LaAlO_3}$/$\mathrm{SrTiO_3}$ contacts and the current through a narrow channel of insulating $\mathrm{SrTiO_3}$ is controlled via an electrostatic side gate. Drain-source I/V-curves have been measured at low and elevated temperatures. The transistor shows strong electric-field and temperature-dependent behaviour with a steep sub-threshold slope %of up to as small as $10\:\mathrm{mV/decade}$ and a transcon…
We investigate by low-temperature transport experiments the sub-threshold behavior of triple-gate silicon field-effect transistors. These three-dimensional nano-scale devices consist of a lithographically defined silicon nanowire surrounded by a gate with an active region as small as a few tens of nanometers, down to 50x60x35 nm^3. Conductance versus gate voltage show Coulomb-blockade oscillations with a large charging energy due to the formation of a small potential well below the gate. According to dependencies on device geometry and thermionic current analysis, we conclude that sub-threshol…
In this paper, we propose the application of a Dual Material Gate (DMG) in a Tunnel Field Effect Transistor (TFET) to simultaneously optimize the on-current, the off-current and the threshold voltage, and also improve the average subthreshold slope, the nature of the output characteristics and the immunity against the DIBL effects. We demonstrate that if appropriate work-functions are chosen for the gate materials on the source side and the drain side, the tunnel field effect transistor shows a significantly improved performance. We apply the technique of DMG in a Strained Double Gate Tunnel F…
The definition of the intrinsic cut-off frequency ($f_T$) based on the current gain equals to one (0 dB) is critically analyzed. A condition for the validity of the quasi-static estimation of $f_T$ is established in terms of the temporal variations of the electric charge and electric flux on the drain, source and gate terminals. Due to the displacement current, an electron traversing the channel length generates a current pulse of finite temporal width. For electron devices where the intrinsic delay time of the current after a transient perturbation is comparable to such width, the displacemen…
Several equations used to model and characterize the linear region IV characteristics of nanoscale field-effect transistors are derived. The meaning of carrier mobility at the nanoscale is discussed by defining two related quantities, the apparent mobility and the ballistic mobility. The validity of Matthiessen's Rule for relating the apparent ability to the ballistic and diffusive mobilities is examined. Other questions that arise in the analysis and characterization of nanoscale field-effect transistors are also discussed. These notes are intended to pull together in one place some key equat…
Interfacial charge transfer plays an essential role in establishing the relative alignment of the metal Fermi level and the energy bands of organic semiconductors. While the details remain elusive in many systems, this charge transfer has been inferred in a number of photoemission experiments. We present electronic transport measurements in very short channel ($L < 100$ nm) transistors made from poly(3-hexylthiophene) (P3HT). As channel length is reduced, the evolution of the contact resistance and the zero-gate-voltage conductance are consistent with such charge transfer. Short channel conduc…
Continued scaling of nanoscale transistors leads to broad device-to-device fluctuation of parameters due to random dopant effects, channel length variation, interface trap generation, etc. In this paper, we obtain the statistics of negative bias temperature instability (NBTI)-induced interface defect generation in ultra-scaled MOSFET by Markov Chain Monte-Carlo (MCMC) solution of Reaction-Diffusion (R-D) model. Our results show that the interface defect generation at a particular stress time, i.e., NIT}@tSTS in small transistors should follow a skew-normal distribution and that the generation …
Spin-based logic devices could operate at very high speed with very low energy consumption and hold significant promise for quantum information processing and metrology. Here, an in-house developed, experimentally verified, ensemble self-consistent Monte Carlo device simulator with a Bloch equation model using a spin-orbit interaction Hamiltonian accounting for Dresselhaus and Rashba couplings is developed and applied to a spin field effect transistor (spinFET) operating under externally applied voltages on a gate and a drain. In particular, we simulate electron spin transport in a \SI{25}{nm}…
Ultralow p-type contact resistance for ultra-nanoscaled 2D-materials transistors
Singapore University of Technology and Design（新加坡科技设计大学）；China Jiliang University（中国计量大学）；Hubei Minzu University（湖北民族大学）；National University of Singapore（新加坡国立大学）
Understanding energy dissipation and transport in nanoscale structures is of great importance for the design of energy-efficient circuits and energy-conversion systems. This is also a rich domain for fundamental discoveries at the intersection of electron, lattice (phonon), and optical (photon) interactions. This review presents recent progress in understanding and manipulation of energy dissipation and transport in nanoscale solid-state structures. First, the landscape of power usage from nanoscale transistors (~10^-8 W) to massive data centers (~10^9 W) is surveyed. Then, focus is given to e…
We derive the quantum trajectory or stochastic (conditional) master equation for a single superconducting Cooper-pair box (SCB) charge qubit measured by a single-electron transistor (SET) detector. This stochastic master equation describes the random evolution of the measured SCB qubit density matrix which both conditions and is conditioned on a particular realization of the measured electron tunneling events through the SET junctions. Hence it can be regarded as a Monte Carlo method that allows us to simulate the continuous quantum measurement process. We show that the master equation for the…
The intermediate transport regime in nanoscale transistors between the fully ballistic case and the quasi equilibrium case described by the drift-diffusion model is still an open modeling issue. Analytical approaches to the problem have been proposed, based on the introduction of a backscattering coefficient, or numerical approaches consisting in the MonteCarlo solution of the Boltzmann transport equation or in the introduction of dissipation in quantum transport descriptions. In this paper we propose a very simple analytical model to seamlessly cover the whole range of transport regimes in ge…
A first-principle model is proposed to study the electrostatic properties of a double-gated silicon slab of nano scale in the framework of density functional theory. The applied gate voltage is approximated as a variation of the electrostatic potential on the boundary of the supercell enclosing the system. With the electron density estimated by the real space Green's functions, efficient multigrid and fast Fourier Poisson solvers are employed to calculate the electrostatic potential from the charge density. In the representation of localized SIESTA linear combination of atomic orbitals, the Ko…
We report on experimental results for the conductance of metallic single-electron transistors as a function of temperature, gate voltage and dimensionless conductance. In contrast to previous experiments our transistor layout allows for a direct measurement of the parallel conductance and no ad hoc assumptions on the symmetry of the transistors are necessary. Thus we can make a comparison between our data and theoretical predictions without any adjustable parameter. Even for rather weakly conducting transistors significant deviations from the perturbative results are noted. On the other hand, …
Using a block of three separated solid elements, a thermal source and drain together with a gate made of an insulator-metal transition material exchanging near-field thermal radiation, we introduce a nanoscale analog of a field-effect transistor which is able to control the flow of heat exchanged by evanescent thermal photons between two bodies. By changing the gate temperature around its critical value, the heat flux exchanged between the hot body (source) and the cold body (drain) can be reversibly switched, amplified, and modulated by a tiny action on the gate. Such a device could find impo…
One consequence of the continued downwards scaling of transistors is the reliance on only a few discrete atoms to dope the channel, and random fluctuations of the number of these dopants is already a major issue in the microelectonics industry. While single-dopant signatures have been observed at low temperature, studying the impact of only one dopant up to room temperature requires extremely small lengths. Here, we show that a single arsenic dopant dramatically affects the off-state behavior of an advanced microelectronics field effect transistor (FET) at room temperature. Furthermore, the io…
Flicker or 1/f noise in metal-oxide-semiconductor field-effect transistors (MOSFETs) has been identified as the main source of noise at low frequency. It often originates from an ensemble of a huge number of charges trapping and detrapping. However, a deviation from the well-known model of 1/f noise is observed for nanoscale MOSFETs and a new model is required. Here, we report the observation of one-by-one trap activation controlled by the gate voltage in a nanowire MOSFET and we propose a new low-frequency-noise theory for nanoscale FETs. We demonstrate that the Coulomb repulsion between elec…
Dots are ideal systems to study fundamentals on heat transfer at the nanoscale and promising nanoscale heat-engines and thermal devices. Here, we report on the validation of our theoretical model on the thermal conductance of a metallic dot single-electron transistor (md-SET) by a recent experiment on the low-T thermal conductance. We compare with the experiment, we emphasize the physics interpretation and characteristic values and we apply the model to evaluate the operation the md-SET as heat-switch. Perfect agreement is shown between the calculated and the measured charge conductance G, hea…
The silicon (Si) based spin-MOSFET (metal-oxide semiconductor field-effect transistor) is considered to be the building block of low-power-consumption electronics, utilizing spin-degrees of freedom in semiconductor devices. In this paper, we review the latest results on the spin transport in nanoscale Si-based spin-valve devices, which is important to realize the nanoscale spin-MOSFET. Our results demonstrate the importance of ballistic transport in obtaining high spin-dependent output voltage in nanoscale Si spin-valve devices.
Single Electron Transistors (SETs) are nanoscale electrometers of unprecedented sensitivity, and as such have been proposed as read-out devices in a number of quantum computer architectures. We show that the functionality of a standard SET can be multiplexed so as to operate as both read-out device and control gate for a solid-state qubit. Multiplexing in this way may be critical in lowering overall gate densities in scalable quantum computer architectures.
We report charge transport measurements in nanoscale vertical pillar structures incorporating ultrathin layers of the organic semiconductor poly(3-hexylthiophene)(P3HT). P3HT layers with thickness down to 5 nm are gently top-contacted using wedging transfer, yielding highly reproducible, robust nanoscale junctions carrying high current densities (up to $10^6$ A/m$^2$). Current-voltage data modeling demonstrates excellent hole injection. This work opens up the pathway towards nanoscale, ultrashort-channel organic transistors for high-frequency and high-current-density operation.
We have fabricated air-stable n-type, ambipolar carbon nanotube field effect transistors (CNFETs), and used them in nanoscale memory cells. N-type transistors are achieved by annealing of nanotubes in hydrogen gas and contacting them by cobalt electrodes. Scanning gate microscopy reveals that the bulk response of these devices is similar to gold-contacted p-CNFETs, confirming that Schottky barrier formation at the contact interface determines accessibility of electron and hole transport regimes. The transfer characteristics and Coulomb Blockade (CB) spectroscopy in ambipolar devices show stron…
Radio-frequency reflectometry in silicon single-electron transistors (SETs) is presented. At low temperatures (<4 K), in addition to the expected Coulomb blockade features associated with charging of the SET dot, quasi-periodic oscillations are observed that persist in the fully depleted regime where the SET dot is completely empty. A model, confirmed by simulations, indicates that these oscillations originate from charging of an unintended floating gate located in the heavily doped polycrystalline silicon gate stack. The technique used in this experiment can be applied for detailed spectrosco…
We propose a practical realization of a field-effect transistor for phonons. Our device is based on a single ionic polymeric molecule and it gives modulations as large as -25% in the thermal conductance for feasible temperatures and electric field magnitudes. Such effect can be achieved by reversibly switching the acoustic torsion mode into an optical mode through the coupling of an applied electric field to the dipole moments of the monomers. This device can pave the way to the future development of phononics at the nanoscale or molecular scale.
We study the low temperature electrical transport behaviour of a silicon single electron transistor. The island and leads are defined by patterned phosphorus doped regions achieved by ion implantation through a polymer resist mask. In the device a 50 nm diameter island, containing ~600 donors and having a metallic density of states, is separated from source and drain leads by undoped silicon tunnel barriers. The central island and tunnel barriers are covered by a surface gate in a field effect transistor geometry allowing the coupling between the leads and island to be controlled. Coulomb bloc…
The ability to actively regulate heat flow at the nanoscale could be a game changer for applications in thermal management and energy harvesting. Such a breakthrough could also enable the control of heat flow using thermal circuits, in a manner analogous to electronic circuits. Here we demonstrate switchable thermal transistors with an order of magnitude thermal on/off ratio, based on reversible electrochemical lithium intercalation in MoS2 thin films. We use spatially-resolved time-domain thermoreflectance to map the lithium ion distribution during device operation, and atomic force microscop…
An evaluation of the gate capacitance of a field-effect transitor (FET) whose channel length and width are several ten nanometer, is a key point for sensors applications. However, experimental and precise evaluation of capacitance in the aF range or less has been extremely difficult. Here, we report an extraction of the capacitance down to 0.55 aF for a silicon FET with a nanoscale wire channel whose width and length are 15 and 50 nm, respectively. The extraction can be achieved by using a combination of four kinds of measurements: current characteristics modulated by double gates, random-tele…
The spin Seebeck effect is studied across a charge insulating magnetic junction, in which thermal-spin conjugate transport is assisted by the exchange interactions between the localized spin in the center and electrons in metallic leads. We show that, in contrast with bulk spin Seebeck effect, the figure of merit of such nanoscale thermal-spin conversion can be infinite, leading to the ideal Carnot efficiency in the linear response regime. We also find that in the nonlinear spin Seebeck transport regime, the device possesses the asymmetric and negative differential spin Seebeck effects. In the…
We report finite-bias characteristics of electrical transport through phosphorus donors in silicon nanoscale transistors, in which we observe inelastic-cotunneling current in the Coulomb blockade region. The cotunneling current appears like a resonant-tunneling current peak emerging from the excited state at the crossover between blockade and non-blockade regions. These cotunneling features are unique, since the inelastic-cotunneling currents have so far been reported either as a broader hump or as a continuous increment of current. This finding is ascribed purely due to excitation-related ine…
We explore the prospects to control by use of time-dependent fields quantum transport phenomena in nanoscale systems. In particular, we study for driven conductors the electron current and its noise properties. We review recent corresponding theoretical descriptions which are based on Floquet theory. Alternative approaches, as well as various limiting approximation schemes are investigated and compared. The general theory is subsequently applied to different representative nanoscale devices, like the non-adiabatic pumps, molecular gates, molecular quantum ratchets, and molecular transistors. P…
Ubiquitous low frequency 1/f noise can be a limiting factor in the performance and application of nanoscale devices. Here, we quantitatively investigate low frequency electronic noise in single-layer transition metal dichalcogenide MoS2 field-effect transistors. The measured 1/f noise can be explained by an empirical formulation of mobility fluctuations with the Hooge parameter ranging between 0.005 and 2.0 in vacuum (< 10-5 Torr). The field-effect mobility decreased and the noise amplitude increased by an order of magnitude in ambient conditions, revealing the significant influence of atmosph…
A theoretical approach for the non-equilibrium transport properties of nanoscale systems coupled to metallic electrodes with strong electron-phonon interactions is presented. It consists in a resummation of the dominant Feynman diagrams from the perturbative expansion in the coupling to the leads. We show that this scheme eliminates the main pathologies found in previous simple analytical approaches for the polaronic regime. The results for the spectral and transport properties are compared with those from several other approaches for a wide range of parameters. The method can be formulated in…
Flash memory based on floating gate transistor is the most widely used memory technology in modern microelectronic applications. We recently proposed a new concept of multilayer graphene nanoribbon (MLGNR) and carbon nanotube (CNT) based floating gate transistor design for future nanoscale flash memory technology. In this paper, we analyze the tunneling current mechanism in the proposed graphene-CNT floating gate transistor. We anticipate that the proposed floating gate transistor would adopt Fowler-Nordheim (FN) tunneling during its programming and erase operations. In this paper, we have inv…
Nanoscale semiconductor materials have been extensively investigated as the channel materials of transistors for energy-efficient low-power logic switches to enable scaling to smaller dimensions. On the opposite end of transistor applications is power electronics for which transistors capable of switching very high voltages are necessary. Miniaturization of energy-efficient power switches can enable the integration with various electronic systems and lead to substantial boosts in energy efficiency. Nanotechnology is yet to have an impact in this arena. In this work, it is demonstrated that nan…
In this work, a new theoretical approach to study the non-equilibrium transport properties of nanoscale systems coupled to metallic electrodes with strong electron-phonon interactions is presented. The proposed approach consists in a resummation of the dominant Feynman diagrams from the exact preturbative expansion. This scheme is compared with methods that can be found in the literature. It shows a good agreement with these methods in the range where they are known to provide good results, for a wide range of parameters. Also, it is compared with path-integral Monte Carlo calculations giving …
We report electronic transport measurements in nanoscale graphene transistors with gold and platinum electrodes whose channel lengths are shorter than 100 nm, and compare them with transistors with channel lengths from 1 \textmu{}m to 50 \textmu{}m. We find a large positive gate voltage shift in charge neutrality point (NP) for transistors made with platinum electrodes but negligible shift for devices made with gold electrodes. This is consistent with the transfer of electrons from graphene into the platinum electrodes. As the channel length increases, the disparity between the measured NP usi…
In recent years, three-dimensional GaN-based transistors have been intensively studied for their dramatically improved output power, better gate controllability, and shorter channels for speedup and miniaturization. However, thermal analysis of such devices is often oversimplified using the conventional Fourier's law and bulk material properties in thermal simulations. In this aspect, accurate temperature predictions can be achieved by coupled phonon and electron Monte Carlo simulations that track the movement and scattering of individual phonons and electrons. However, the heavy computational…
In view of the appreciable semiconducting gap of 0.26 eV observed in recent experiments, epitaxial graphene on a SiC substrate seems a promising channel material for FETs. Indeed, it is two-dimensional - and therefore does not require prohibitive lithography - and exhibits a wider gap than other alternative options, such as bilayer graphene. Here we propose a model and assess the achievable performance of a nanoscale FET based on epitaxial graphene on SiC, conducting an exploration of the design parameter space. We show that the current can be modulated by 4 orders of magnitude; for digital ap…
Controlling heat flow by phononic nanodevices has received significant attention recently because of its fundamental and practical implications. Elementary phononic devices such as thermal rectifiers, transistors, and logic gates are essentially based on two intriguing properties: heat diode effect and negative differential thermal conductance. However, little is known about these heat transfer properties across metal-dielectric interfaces, especially at nanoscale. Here we analytically resolve the microscopic mechanism of the nonequilibrium nanoscale energy transfer across metal-dielectric int…
In this paper, we have presented the impact of the gate leakage through thin gate dielectrics (SiO2 and high-\k{appa} gate dielectric) on the subthreshold characteristics of the tunnel field effect transistors (TFET) for a low operating voltage of 0.5 V. Using calibrated two-dimensional simulations it is shown that even for such a low operating voltage, the gate leakage substantially degrades several subthreshold parameters of the TFET such as the off-state current, minimum subthreshold swing and average subthreshold swing. While the drain-offset as well as the short-gate are effective methods…
It is commonly believed that the significant energy saving advantages are belonged to the logic circuits which operate at low temperature as less enegy is needed for cooling them to the treshold temperature after operation. Also, nanoscale thermal management, efficient energy usage in nanoscale and especially thermal optimization are the most challenging issues, while dealing with the new generation of transistors as the miniaturizing unlimitedly the silicon channels of the transistors has resulted in an increase in the energy consumption of computers and the leakage currents. In this paper, t…
We report quantitative measurements of nanoscale permittivity and conductivity using tuning-fork (TF) based microwave impedance microscopy (MIM). The system is operated under the driving amplitude modulation mode, which ensures satisfactory feedback stability on samples with rough surfaces. The demodulated MIM signals on a series of bulk dielectrics are in good agreement with results simulated by finite-element analysis. Using the TF-MIM, we have visualized the evolution of nanoscale conductance on back-gated $MoS_2$ field effect transistors and the results are consistent with the transport da…
Single electron transistors (SETs) made from single wall carbon nanotubes (SWCNTs) are promising for quantum electronic devices operating with ultra-low power consumption and allow fundamental studies of electron transport. We report on SETs made by registered in-plane growth utilizing tailored nanoscale catalyst patterns and chemical vapor deposition. Metallic SWCNTs have been removed by an electrical burn-in technique and the common gate hysteresis was removed using PMMA and baking, leading to field effect transistors with large on/off ratios up to 10^5. Further segmentation into 200 nm shor…
