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arXiv 2103.07692cs.CCcs.DM
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多层$d$维电路的复杂性

The complexity of multilayer $d$-dimensional circuits

T. R. Sitdikov, G. V. Kalachev

摘要:

本文研究了一种具有单一逻辑层的多层电路模型。我们考虑$λ$ -可分图作为电路的支持。我们建立了这类电路的香农函数下界$\max \bigl(\frac{2^n}{n}, \frac{2^n (1 - λ)}{\log k} \bigr)$,其中$k$是层数。对于$d$ -维图,对于$λ= \frac{d - 1}{d}$是$λ$ -可分的,这给出了香农函数下界$\frac{2^n}{\min(n, d \log k)}$ .对于多维矩形电路,证明的下限渐近匹配的上限。

英文摘要:

In this paper we research a model of multilayer circuits with a single logical layer. We consider $λ$-separable graphs as a support for circuits. We establish the Shannon function lower bound $\max \bigl(\frac{2^n}{n}, \frac{2^n (1 - λ)}{\log k} \bigr)$ for this type of circuits where $k$ is the number of layers. For $d$-dimensional graphs, which are $λ$-separable for $λ= \frac{d - 1}{d}$, this gives the Shannon function lower bound $\frac{2^n}{\min(n, d \log k)}$. For multidimensional rectangular circuits the proved lower bound asymptotically matches to the upper bound.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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