Reversible logic has come to the forefront of theoretical and applied research today. Although many researchers are investigating techniques to synthesize reversible combinational logic, there is little work in the area of sequential reversible logic. Latches and flip-flops are the most significant memory elements for the forthcoming sequential memory elements. In this paper, we proposed two new reversible logic gates MG-1 and MG-2. We then proposed new design techniques for latches and flip-flops with the help of the new proposed gates. The proposed designs are better than the existing ones in terms of number of gates, garbage outputs and delay.
Reversible computing has attracted the attention of researchers due to its low power consumption and less heat dissipation compared to conventional computing. A number of reversible gates have been proposed by different researchers and various combinational circuits based on reversible gates have been developed. However the realization of sequential circuit in reversible logic is still at premature stage. Sequential circuits were not available because of feedback was not allowed in reversible circuit. However allowing feedback in space (not in time), some sequential reversible gates and circui…
Reversible sequential circuits are going to be the significant memory blocks for the forthcoming computing devices for their ultra low power consumption. Therefore design of various types of latches has been considered a major objective for the researchers quite a long time. In this paper we proposed efficient design of reversible sequential circuits that are optimized in terms of quantum cost, delay and garbage outputs. For this we proposed a new 3*3 reversible gate called SAM gate and we then design efficient sequential circuits using SAM gate along with some of the basic reversible logic ga…
In this paper, reversible circuits consisting of NOT, CNOT and 2-CNOT gates are studied. Several asymptotically optimal by the order of magnitude synthesis methods are described. Some circuit's complexity reduction approaches are considered. Implementation of discrete logarithm within a reversible circuit is discussed. The main conclusion in the paper is that the usage of additional inputs (additional memory) in reversible circuits almost always allow to reduce their complexity, depth and weight.
This paper presents a heuristic cost minimization approach to synthesizing linear reversible circuits. Two bidirectional linear reversible circuit synthesis methods are introduced, the Alternating Elimination with Cost Minimization method (AECM) and the Multiple CNOT Gate method (MCG). Algorithms, example syntheses, and extensions to these methods are presented. An MCG variant which incorporates line reordering is introduced. Tests comparing the new cost minimization methods with the best known method for large circuits are presented. Results show that of the three methods MCG had the lowest a…
The paper discusses the gate complexity of reversible circuits consisting of NOT, CNOT and 2-CNOT gates. The Shannon gate complexity function $L(n, q)$ for a reversible circuit, implementing a Boolean transformation $f\colon \mathbb Z_2^n \to \mathbb Z_2^n$, is defined as a function of $n$ and the number of additional inputs $q$. The general lower bound $L(n,q) \geq \frac{2^n(n-2)}{3\log_2(n+q)} - \frac{n}{3}$ for the gate complexity of a reversible circuit is proved. An upper bound $L(n,0) \leqslant 3n2^{n+4}(1+o(1)) \mathop / \log_2n$ for the gate complexity of a reversible circuit without a…
Quantum computers are considered as a future alternative to circumvent the heat dissipation problem of VLSI circuits. The synthesis of reversible circuits is a very promising area of study considering the expected further technological advances towards quantum computing. In this report, we propose a linear genetic programming system to design reversible circuits -RIMEP2-. The system has evolved reversible circuits starting from scratch without resorting to a pre-existing library. The results show that among the 26 considered benchmarks, RIMEP2 outperformed the best published solutions for 20 o…
The paper discusses the asymptotic depth of a reversible circuit consisting of NOT, CNOT and 2-CNOT gates. Reversible circuit depth function $D(n, q)$ for a circuit implementing a transformation $f\colon \mathbb Z_2^n \to \mathbb Z_2^n$ is introduced as a function of $n$ and the number of additional inputs $q$. It is proved that for the case of implementing a permutation from $A(\mathbb Z_2^n)$ with a reversible circuit having no additional inputs the depth is bounded as $D(n, 0) \gtrsim 2^n / (3\log_2 n)$. It is proved that for the case of implementing a transformation $f\colon \mathbb Z_2^n …
With phenomenal growth of high speed and complex computing applications, the design of low power and high speed logic circuits have created tremendous interest. Conventional computing devices are based on irreversible logic and further reduction in power consumption and/or increase in speed appears non-promising. Reversible computing has emerged as a solution looking to the power and speed requirements of future computing devices. In reversible computing logic gates used are such that input can be generated by reversing the operation from output. A number of reversible combinational circuits h…
The paper studies the main aspects of the realization of 2 x 2 ternary reversible circuits based on cycles, considering the results of the realization of all 362,880 2 x 2 ternary reversible functions. It has been shown that in most cases, realizations obtained with the MMD+ algorithm have a lower complexity (in terms of cost) than realizations based on cycles. In the paper it is shown under which conditions realizations based on transpositions may have a higher or a lower cost than realizations using larger cycles. Finally it is shown that there are a few special cases where realizations base…
Reversible computation is one of the most promising emerging technologies of the future. The usage of reversible circuits in computing devices can lead to a significantly lower power consumption. In this paper we study reversible logic circuits consisting of NOT, CNOT and 2-CNOT gates. We introduce a set $F(n,q)$ of all transformations $\mathbb Z_2^n \to \mathbb Z_2^n$ that can be implemented by reversible circuits with $(n+q)$ inputs. We define the Shannon gate complexity function $L(n,q)$ and the depth function $D(n,q)$ as functions of $n$ and the number of additional inputs $q$. First, we p…
The synthesis approaches for quantum circuits typically aim at minimizing the number of lines or gates. Given the tight restrictions on those logical resources in physical implementations, we propose to view the problem fundamentally different: Given noisy gates and a fixed number of lines, how can we use them to perform a computation as precisely as possible? In this paper we show approximate circuits can be deployed for computations with limited resources. Performing experiments on a QC simulator, we show that under the influence of noise, approximate circuits can have lower error-rates than…
Synthesis of reversible logic circuits has gained great atten- tion during the last decade. Various synthesis techniques have been pro- posed, some generate optimal solutions (in gate count) and are termed as exact, while others are scalable in the sense that they can handle larger functions but generate sub-optimal solutions. Although scalable synthe- sis is very much essential for circuit design, exact synthesis is also of great importance as it helps in building design library for the synthesis of larger functions. In this paper, we propose an exact synthesis technique for re- versible circ…
In the last decades, great achievements have been made in the development of computing machines. However, due to exponential growth of transistor density and in particular due to tremendously increasing power consumption, researchers expect that "Conventional Technologies" like Complementary Metal-Oxide Semiconductor will reach their limits in near future. To further satisfy the needs for more computational power, speed, less size etc. alternatives are needed. Reversible Computation is the emerging field and alternative of conventional technologies. Reversible Computation is emerging as a prom…
Many universal reversible libraries that contain more than one gate type have been proposed in the literature. Practical implementation of reversible circuits is much easier if a single gate type is used in the circuit construction. This paper proposes a reversible n-bit gate that is universal for reversible circuits synthesis. The proposed gate is extendable according to the size of the circuit. The paper shows that the size of the synthesized circuits using the proposed gate is comparable with the size of the synthesized circuits using the hybrid reversible libraries for 3-in/out reversible …
Making a reversible circuit fault-tolerant is much more difficult than classical circuit and there have been only a few works in the area of parity-preserving reversible logic design. Moreover, all of these designs are ad hoc, based on some pre-defined parity preserving reversible gates as building blocks. In this paper, we for the first time propose a novel and systematic approach towards parity preserving reversible circuits design. We provide some related theoretical results and give two algorithms, one from reversible specification to parity preserving reversible specification and another …
We report optimal and asymptotically optimal reversible circuits composed of NOT, CNOT, and Toffoli (NCT) gates, keeping the count by the subsets of the gate types used. This study fine tunes the circuit complexity figures for the realization of reversible functions via reversible NCT circuits. An important consequence is a result on the limitation of the use of the $T$-count quantum circuit metric popular in applications.
For years, the quantum/reversible circuit community has been convinced that: a) the addition of auxiliary qubits is instrumental in constructing a smaller quantum circuit; and, b) the introduction of quantum gates inside reversible circuits may result in more efficient designs. This paper presents a systematic approach to optimizing reversible (and quantum) circuits via the introduction of auxiliary qubits and quantum gates inside circuit designs. This advances our understanding of what may be achieved with a) and b).
Reversible computation is gaining increasing relevance in the context of several post-CMOS technologies, the most prominent of those being Quantum computing. One of the key theoretical problem pertaining to reversible logic synthesis is the upper bound of the gate count. Compared to the known bounds, the results obtained by optimal synthesis methods are significantly less. In this paper, we connect this problem with the multiplicative complexity analysis of classical Boolean functions. We explore the possibility of relaxing the ancilla and if that approach makes the upper bound tighter. Our re…
Reversible computing has emerged as a possible low cost alternative to conventional computing in terms of speed, power consumption and computing capability. In order to achieve reliable circuits in reversible computing, provision for fault tolerance is necessary. A number of fault models, fault tolerant techniques (such as parity-preserving) and testing approaches have proposed in literature. This dissertation exploits parity-preserving characteristics of two reversible gates which provide low cost parity-preserving based fault tolerance. In order to extend online testability of reversible cir…
The paper discusses various applications of permutation group theory in the synthesis of reversible logic circuits consisting of Toffoli gates with negative control lines. An asymptotically optimal synthesis algorithm for circuits consisting of gates from the NCT library is described. An algorithm for gate complexity reduction, based on equivalent replacements of gates compositions, is introduced. A new approach for combining a group-theory-based synthesis algorithm with a Reed-Muller-spectra-based synthesis algorithm is described. Experimental results are presented to show that the proposed s…
Reversible logic has two main properties. First, the number of inputs is equal to the number of outputs. Second, it implements a one-to-one mapping; i.e., one can reconstruct the inputs from the outputs. These properties enable its applications in building quantum computing architectures. In this paper, we study reverse engineering of reversible logic circuits, including reverse engineering of non-reversible functions embedded into reversible circuits. We propose the number of embeddings of non-reversible functions into a reversible circuit as the security metric for reverse engineering. We an…
For Reversible computing, Target technology is yet to become available. Adequate tools are not yet developed for reversible technology. Simulation is still under development. Classical logic synthesis methods and simulation tools can not be used in reversible computing. Because these work on irreversible logic blocks but in reversible computing reversible logic blocks are used for design and implementation. So, we need a simulation platform to analysis and development in this area. So, we worked on this area and developed a GUI based simulator. In the Dissertation work, we undertook simulation…
In this work, we consider error detection via simulation for reversible circuit architectures. We rigorously prove that reversibility augments the performance of this simple error detection protocol to a considerable degree. A single randomly generated input is guaranteed to unveil a single error with a probability that only depends on the size of the error, not the size of the circuit itself. Empirical studies confirm that this behavior typically extends to multiple errors as well. In conclusion, reversible circuits offer characteristics that reduce masking effects -- a desirable feature that…
Reversible logic is gaining interest of many researchers due to its low power dissipating characteristic. In this paper we proposed a new approach for designing online testable reversible circuits. The resultant testable reversible circuit can detect any single bit error whiles it is operating. Appropriate theorems and lemmas are presented to clarify the proposed design. The experimental results show that our design approach is superior in terms of number of number of gates, garbage outputs and quantum cost.
Optimal synthesis of reversible functions is a non-trivial problem. One of the major limiting factors in computing such circuits is the sheer number of reversible functions. Even restricting synthesis to 4-bit reversible functions results in a huge search space (16! {\approx} 2^{44} functions). The output of such a search alone, counting only the space required to list Toffoli gates for every function, would require over 100 terabytes of storage. In this paper, we present two algorithms: one, that synthesizes an optimal circuit for any 4-bit reversible specification, and another that synthesiz…
Reversible logic circuits have been historically motivated by theoretical research in low-power electronics as well as practical improvement of bit-manipulation transforms in cryptography and computer graphics. Recently, reversible circuits have attracted interest as components of quantum algorithms, as well as in photonic and nano-computing technologies where some switching devices offer no signal gain. Research in generating reversible logic distinguishes between circuit synthesis, post-synthesis optimization, and technology mapping. In this survey, we review algorithmic paradigms --- search…
The generation of reversible circuits from high-level code is an important problem in several application domains, including low-power electronics and quantum computing. Existing tools compile and optimize reversible circuits for various metrics, such as the overall circuit size or the total amount of space required to implement a given function reversibly. However, little effort has been spent on verifying the correctness of the results, an issue of particular importance in quantum computing. There, compilation allows not only mapping to hardware, but also the estimation of resources required…
Recently, reversible circuit synthesis has been intensively studied. One of the problems that has not been solved for a long time was exact minimization of gate count (GC) in 4-bit circuits. Finally, last year a tool of practical usage for finding optimal gate count Toffoli networks for any 4-variable function was developed. However, not much work has been done yet on exact minimization of quantum cost (QC) in 4-bit circuits. This paper presents an application of the above mentioned tool to reducing QC of 4-bit reversible circuits. It is shown that for benchmarks and for designs taken from rec…
We develop a framework for resource efficient compilation of higher-level programs into lower-level reversible circuits. Our main focus is on optimizing the memory footprint of the resulting reversible networks. This is motivated by the limited availability of qubits for the foreseeable future. We apply three main techniques to keep the number of required qubits small when computing classical, irreversible computations by means of reversible networks: first, wherever possible we allow the compiler to make use of in-place functions to modify some of the variables. Second, an intermediate repres…
In his 2003 paper "Towards an algebraic theory of Boolean circuits", Lafont notes that the class of reversible circuits over a set of k truth values is finitely generated when k is odd. He cites a private communication for the proof. The purpose of this short note is to make the content of that communication available.
The reversible logic can be used in various research areas, e.g. quantum computation, cryptography and signal processing. In the paper we study reversible logic circuits with additional inputs, which consist of NOT, CNOT and C\textsuperscript{2}NOT gates. We consider a set $F(n,q)$ of all transformations $\mathbb B^n \to \mathbb B^n$ that can be realized by reversible circuits with $(n+q)$ inputs. An analogue of Lupanov's method for the synthesis of reversible logic circuits with additional inputs is described. We prove upper asymptotic bounds for the Shannon gate complexity function $L(n,q)$ …
Near zero-energy computing describes the concept of executing logic operations below the (kBT ln 2) energy limit. Landauer discussed that it is impossible to break this limit as long as the computations are performed in the conventional, non-reversible way. But even if reversible computations were performed, the basic energy needed for operating circuits realized in conventional technologies is still far above the (kBT ln 2) energy limit, i.e. the circuits do not operate physically reversible. In contrast, novel nanotechnologies like Quantum-dot Cellular Automata (QCA) allow for computations w…
Reversible logic has applications in various research areas including low-power design and quantum computation. In this paper, a rule-based optimization approach for reversible circuits is proposed which uses both negative and positive control Toffoli gates during the optimization. To this end, a set of rules for removing NOT gates and optimizing sub-circuits with common-target gates are proposed. To evaluate the proposed approach, the best-reported synthesized circuits and the results of a recent synthesis algorithm which uses both negative and positive controls are used. Our experiments reve…
Linear reversible circuits represent a subclass of reversible circuits with many applications in quantum computing. These circuits can be efficiently simulated by classical computers and their size is polynomially bounded by the number of qubits, making them a good candidate to deploy efficient methods to reduce computational costs. We propose a new algorithm for synthesizing any linear reversible operator by using an optimized version of the Gaussian elimination algorithm coupled with a tuned LU factorization. We also improve the scalability of purely greedy methods. Overall, on random operat…
In this paper, simultaneous reduction of circuit depth and synthesis cost of reversible circuits in quantum technologies with limited interaction is addressed. We developed a cycle-based synthesis algorithm which uses negative controls and limited distance between gate lines. To improve circuit depth, a new parallel structure is introduced in which before synthesis a set of disjoint cycles are extracted from the input specification and distributed into some subsets. The cycles of each subset are synthesized independently on different sets of ancillae. Accordingly, each disjoint set can be synt…
Reversible single-target gates are a generalization of Toffoli gates which are a helpful formal representation for the description of synthesis algorithms but are too general for an actual implementation based on some technology. There is an exponential lower bound on the number of Toffoli gates required to implement any reversible function, however, there is also a linear upper bound on the number of single-target gates which can be proven using a constructive proof based on a former presented synthesis algorithm. Since single-target gates can be mapped to a cascade of Toffoli gates, this syn…
In quantum computing the decoherence time of the qubits determines the computation time available and this time is very limited when using current hardware. In this paper we minimize the execution time (the depth) for a class of circuits referred to as linear reversible circuits, which has many applications in quantum computing (e.g., stabilizer circuits, CNOT+T circuits, etc.). We propose a practical formulation of a divide and conquer algorithm that produces quantum circuits that are twice as shallow as those produced by existing algorithms. We improve the theoretical upper bound of the dept…
We say that a reversible boolean function on n bits has alternation depth d if it can be written as the sequential composition of d reversible boolean functions, each of which acts only on the top n-1 bits or on the bottom n-1 bits. Moreover, if the functions on n-1 bits are even, we speak of even alternation depth. We show that every even reversible boolean function of n >= 4 bits has alternation depth at most 9 and even alternation depth at most 13.
Reversible logic has attracted substantial interest due to its low power consumption which is the main concern of low power VLSI circuit design. In this paper, a novel 4x4 reversible gate called inventive gate has been introduced and using this gate 1-bit, 2-bit, 8-bit, 32-bit and n-bit group-based reversible comparator have been constructed with low value of reversible parameters. The MOS transistor realizations of 1-bit, 2- bit, and 8-bit of reversible comparator are also presented and finding power, delay and power delay product (PDP) with appropriate aspect ratio W/L. Novel inventive gate …
Linear Nearest Neighbor (LNN) synthesis in reversible circuits has emerged as an important issue in terms of technological implementation for quantum computation. The objective is to obtain a LNN architecture with minimum gate cost. As achieving optimal synthesis is a hard problem, heuristic methods have been proposed in recent literature. In this work we present a graph partitioning based approach for LNN synthesis with reduction in circuit cost. In particular, the number of SWAP gates required to convert a given gate-level quantum circuit to its equivalent LNN configuration is minimized. Our…
Reversible circuits form the backbone for many promising emerging technologies such as quantum computing, low power/adiabatic design, encoder/decoder devices, and several other applications. In the recent years, the scalable synthesis of such circuits has gained significant attention. In this work, we present the SyReC Synthesizer, a synthesis tool for reversible circuits based on the hardware description language SyReC. SyReC allows to describe reversible functionality at a high level of abstraction. The provided SyReC Synthesizer then realizes this functionality in a push-button fashion. Cor…
In previous work and motivated by a theoretical discussion on physical realizations, a new quantum gate library (the NCV-v1 library) for electronic design automation of quantum circuits has been proposed. Here, qudits instead of qubits are assumed, i.e. a basic building block which does not rely on a two level quantum system but a (multiple-valued) d-level quantum system is assumed. However, the descriptions on the foundation of this new library remained brief. This technical report provides an extended description of the applied ideas and concepts.
The Hidden Weighted Bit function plays an important role in the study of classical models of computation. A common belief is that this function is exponentially hard for the implementation by reversible ancilla-free circuits, even though introducing a small number of ancillae allows a very efficient implementation. In this paper, we refute the exponential hardness conjecture by developing a polynomial-size reversible ancilla-free circuit computing the Hidden Weighted Bit function. Our circuit has size $O(n^{6.42})$, where $n$ is the number of input bits. We also show that the Hidden Weighted B…
In this work, we present a class of new designs for reversible binary and BCD adder circuits. The proposed designs are primarily optimized for the number of ancilla inputs and the number of garbage outputs and are designed for possible best values for the quantum cost and delay. First, we propose two new designs for the reversible ripple carry adder: (i) one with no input carry $c_0$ and no ancilla input bits, and (ii) one with input carry $c_0$ and no ancilla input bits. The proposed reversible ripple carry adder designs with no ancilla input bits have less quantum cost and logic depth (delay…
Reversible logic synthesis is emerging as a major research component for post-CMOS computing devices, in particular Quantum computing. In this work, we link the reversible logic synthesis problem to sorting algorithms. Based on our analysis, an alternative derivation of the worst-case complexity of generated reversible circuits is provided. Furthermore, a novel column-wise reversible logic synthesis method, termed RevCol, is designed with inspiration from radix sort. Extending the principles of RevCol, we present a hybrid reversible logic synthesis framework. The theoretical and experimental r…
We investigate the subclass of reversible functions that are self-inverse and relate them to reversible circuits that are equal to their reverse circuit, which are called palindromic circuits. We precisely determine which self-inverse functions can be realized as a palindromic circuit. For those functions that cannot be realized as a palindromic circuit, we find alternative palindromic representations that require an extra circuit line or quantum gates in their construction. Our analyses make use of involutions in the symmetric group $S_{2^n}$ which are isomorphic to self-inverse reversible fu…
Integer arithmetic is the underpinning of many quantum algorithms, with applications ranging from Shor's algorithm over HHL for matrix inversion to Hamiltonian simulation algorithms. A basic objective is to keep the required resources to implement arithmetic as low as possible. This applies in particular to the number of qubits required in the implementation as for the foreseeable future this number is expected to be small. We present a reversible circuit for integer multiplication that is inspired by Karatsuba's recursive method. The main improvement over circuits that have been previously re…
Reversible logic circuit is a necessary construction for achieving ultra low power dissipation as well as for prominent post-CMOS computing technologies such as Quantum computing. Consequently automatic synthesis of a Boolean function using elementary reversible logic gates has received significant research attention in recent times, creating the domain of reversible logic synthesis. In this paper, we study the complexity of reversible logic synthesis. The problem is separately studied for bounded-ancilla and ancilla-free optimal synthesis approaches. The computational complexity for both case…
Common quantum algorithms make heavy use of ancillae: scratch qubits that are initialized at some state and later returned to that state and discarded. Existing quantum circuit languages let programmers assert that a qubit has been returned to the |0> state before it is discarded, allowing for a range of optimizations. However, existing languages do not provide the tools to verify these assertions, introducing a potential source of errors. In this paper we present methods for verifying that ancillae are discarded in the desired state, and use these methods to implement a verified compiler from…
In this article we show how the structure of Coxeter groups are present in gate sets of reversible and quantum computing. These groups have efficient word problems which means that circuits built from these gates have potential to be shortened efficiently. This is especially useful in the case of quantum computing when one does not have the timescale to perform a long series of gates and so one must and a gate scheduling that minimizes circuit depth. As the main example we consider the oracle for 3SAT.
The distribution of reversible programs tends to a limit as their size increases. For problems with a Hamming distance fitness function the limiting distribution is binomial with an exponentially small chance (but non~zero) chance of perfect solution. Sufficiently good reversible circuits are more common. Expected RMS error is also calculated. Random unitary matrices may suggest possible extension to quantum computing. Using the genetic programming (GP) benchmark, the six multiplexor, circuits of Toffoli gates are shown to give a fitness landscape amenable to evolutionary search. Minimal CCNOT…
Adiabatic circuits are heavily investigated since they allow for computations with an asymptotically close to zero energy dissipation per operation - serving as an alternative technology for many scenarios where energy efficiency is preferred over fast execution. Their concepts are motivated by the fact that the information lost from conventional circuits results in an entropy increase which causes energy dissipation. To overcome this issue, computations are performed in a (conditionally) reversible fashion which, additionally, have to satisfy switching rules that are different from convention…
A reversible logic has application in quantum computing. A reversible logic design needs resources such as ancilla and garbage qubits to reconfigure circuit functions or gate functions. The removal of garbage qubits and ancilla qubits are essential in designing an efficient quantum circuit. In the literature, there are multiple designs that have been proposed for a reversible multiplication operation. A multiplication hardware is essential for the circuit design of quantum algorithms, quantum cryptanalysis, and digital signal processing (DSP) applications. The existing designs of reversible qu…
Now a day reversible logic is an attractive research area due to its low power consumption in the area of VLSI circuit design. The reversible logic gate is utilized to optimize power consumption by a feature of retrieving input logic from an output logic because of bijective mapping between input and output. In this manuscript, we design 4 2 and 5 2 reversible compressor circuits using a new type of reversible gate. In addition, we propose new gate, named as inventive0 gate for optimizing a compressor circuit. The utility of the inventive0 gate is that it can be used as full adder and full sub…
We perform formal verification of quantum circuits by integrating several techniques specialized to particular classes of circuits. Our verification methodology is based on the new notion of a reversible miter that allows one to leverage existing techniques for circuit simplification of quantum circuits. For reversible circuits which arise as runtime bottlenecks of key quantum algorithms, we develop several verification techniques and empirically compare them. We also combine existing quantum verification tools with the use of SAT-solvers. Experiments with circuits for Shor's number-factoring …
Reversible logic has applications in low-power computing and quantum computing. However, there are few existing designs for reversible floating-point adders and none suitable for quantum computation. In this paper we propose a space-efficient reversible floating-point adder, suitable for binary quantum computation, improving the design of Nachtigal et al. Our work focuses on improving the reversible designs of the alignment unit and the normalization unit, which are the most expensive parts. By changing a few elements of the existing algorithm, including the circuit designs of the RLZC (revers…
Research on quantum computing has recently gained significant momentum since first physical devices became available. Many quantum algorithms make use of so-called oracles that implement Boolean functions and are queried with highly superposed input states in order to evaluate the implemented Boolean function for many different input patterns in parallel. To simplify or enable a realization of these oracles in quantum logic in the first place, the Boolean reversible functions to be realized usually need to be broken down into several non-reversible sub-functions. However, since quantum logic i…
