一种在线可测可逆电路设计的新方法
A Novel Approach for Designing Online Testable Reversible Circuits
摘要：
可逆逻辑由于其低功耗的特性而引起了研究者的兴趣。本文提出了一种设计在线可测可逆电路的新方法。所得到的可测试可逆电路可以检测任何一位错误，而它正在工作。适当的定理和引理，以澄清所提出的设计。实验结果表明，我们的设计方法是优越的门数，垃圾输出和量子成本。
英文摘要：
Reversible logic is gaining interest of many researchers due to its low power dissipating characteristic. In this paper we proposed a new approach for designing online testable reversible circuits. The resultant testable reversible circuit can detect any single bit error whiles it is operating. Appropriate theorems and lemmas are presented to clarify the proposed design. The experimental results show that our design approach is superior in terms of number of number of gates, garbage outputs and quantum cost.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
