The ATLAS detector at CERN's Large Hadron Collider will be exposed to proton-proton collisions from beams crossing at 40 MHz that have to be reduced to the few 100 Hz allowed by the storage systems. A three-level trigger system has been designed to achieve this goal. We describe the configuration system under construction for the ATLAS trigger chain. It provides the trigger system with all the parameters required for decision taking and to record its history. The same system configures the event reconstruction, Monte Carlo simulation and data analysis, and provides tools for accessing and manipulating the configuration data in all contexts.
The Trigger Data Serializer (TDS) is a custom ASIC designed for the upgrade of the innermost station of the endcap ATLAS Muon Spectrometer. It is a mixed-signal chip with two working modes that can handle up to 128 detector channels. A total of 6,000 TDS ASICs have been produced for detector operation. This paper discusses a custom automatic test platform we developed to provide quality control of the TDS ASICs. We introduce the design, test procedures, and results obtained from this TDS testing platform.
In this paper, we present the design and test results of LOCx2, a transmitter ASIC for the ATLAS Liquid Argon Calorimeter trigger upgrade. LOCx2 consists of two channels and each channel encodes ADC data with an overhead of 14.3% and transmits serial data at 5.12 Gbps with a latency of less than 27.2 ns. LOCx2 is fabricated with a commercial 0.25-um Silicon-on-Sapphire CMOS technology and is packaged in a 100-pin QFN package. The power consumption of LOCx2 is about 843 mW.
Two optical data link data transmission Application Specific Integrated Circuits (ASICs), the baseline and its backup, have been designed for the ATLAS Liquid Argon (LAr) Calorimeter Phase-I trigger upgrade. The latency of each ASIC and that of its corresponding receiver implemented in a back-end Field-Programmable Gate Array (FPGA) are critical specifications. In this paper, we present the latency measurements and simulation of two ASICs. The measurement results indicate that both ASICs achieve their design goals and meet the latency specifications. The consistency between the simulation and …
The ATLAS experiment at the Large Hadron Collider employs a two-level trigger system to record data at an average rate of 1 kHz from physics collisions, starting from an initial bunch crossing rate of 40 MHz. During the LHC Run 2 (2015-2018), the ATLAS trigger system operated successfully with excellent performance and flexibility by adapting to the various run conditions encountered and has been vital for the ATLAS Run-2 physics programme. For proton-proton running, approximately 1500 individual event selections were included in a trigger menu which specified the physics signatures and select…
For Run 3 (from 2021), the LHC will undergo a significant increase in instantaneous luminosity to 1.5 times its current value which will lead to larger collected statistics and an enhanced sensitivity to new physics. The Phase-1 upgrade of the ATLAS Level-1 endcap muon trigger is essential to keep the physics acceptance at Run 3. A new trigger logic to take coincidence with detectors inside and outside the magnetic field is described and is shown to reduce the trigger rate to lower than the required level in Run 3. A new trigger board, NSL, to integrate all the information from various detecto…
This paper presents several component prototypes towards a low-latency, small-form-factor optical link designed for the ATLAS Liquid Argon Calorimeter Phase-I trigger upgrade. A prototype of the custom-made dual-channel optical transmitter module, the Miniature optical Transmitter (MTx), with separate transmitter optical sub-assemblies (TOSAs) has been demonstrated at data rates up to 8 Gbps per channel. A Vertical-Cavity Surface-Emitting Laser (VCSEL) driver ASIC has been developed and is used in the current MTx prototypes. A serializer ASIC prototype, operating at up to 8 Gbps per channel, h…
The PreProcessor of the ATLAS Level-1 Calorimeter Trigger prepares the analogue trigger signals sent from the ATLAS calorimeters by digitising, synchronising, and calibrating them to reconstruct transverse energy deposits, which are then used in further processing to identify event features. During the first long shutdown of the LHC from 2013 to 2014, the central components of the PreProcessor, the Multichip Modules, were replaced by upgraded versions that feature modern ADC and FPGA technology to ensure optimal performance in the high pile-up environment of LHC Run 2. This paper describes the…
The Pad Front End Board (pFEB) and the Strip Front End Board (sFEB) are developed for the ATLAS Phase-I sTGC Trigger Upgrade. The pFEB is used to to gather and analyze pads trigger, and the sFEB is developed to accept the pad trigger to define the regions-of-interest for strips readout. The performance of p/sFEBs must be confirmed before they are mounted on the sTGC detector. We will present the scanning test system prototype which is designed according to the test requirements of the p/sFEB. In this test system prototype, a simulation signal board is developed to generate different types of s…
Development of a Highly Selective First-Level Muon Trigger for ATLAS at HL-LHC Exploiting Precision Muon Drift-Tube Data
高亮度大型强子对撞机（HL-LHC）将提供一个独特的机会来探索物理学的本质，超越强和电弱相互作用的标准模型。高度选择性的第一级触发器对于HL-LHC的ATLAS实验的物理方案至关重要，其中瞬时光度将超过LHC Run 1的瞬时光度约一个数量级。ATLAS第一级μ子触发率主要由低动量μ子控制，这是因为RPC和TGC触发室的中等动量分辨率而被接受的。利用精密μ子漂移管（MDT）室的数据进行一级触发决策，可以克服这一局限性。这需要将MDT命中连续快速传输到检测器外触发逻辑和快速跟踪重建算法。μ子触发率的减少，可实现与建议的新的触发概念，一种新的快速跟踪重建算法的性能，和第一个硬件演示的方案与μ子测试束数据在欧洲核子研究中心伽马辐照设施进行了讨论。
A radiation-hard quad-channel 12-bit 40 MSPS pipeline analog-to-digital converter (ADC) has been designed for the trigger readout electronics Phase-I upgrade of the ATLAS Liquid Argon calorimeter, at the CERN Large Hadron Collider. The final version of the custom design, fabricated in a commercial 130 nm CMOS process, is presented and found to meet the system requirements for analog performance and radiation tolerance. The procedure for quality control of 17200 ADCs is described and the results are presented.
The ATLAS experiment at the Large Hadron Collider (LHC) employs a trigger system consisting of a first-level hardware trigger (L1) and a software-based high-level trigger. The L1 muon trigger system selects muon candidates, assigns them to the correct LHC bunch crossing and classifies them into one of six transverse-momentum threshold classes. The L1 muon trigger system uses resistive-plate chambers (RPCs) to generate the muon-induced trigger signals in the central (barrel) region of the ATLAS detector. The ATLAS RPCs are arranged in six concentric layers and operate in a toroidal magnetic fie…
The ATLAS phase-I upgrade aims to enhance event trigger performance in the Liquid Argon (LAr) calorimeter and the forward muon spectrometer. The trigger signals are transmitted by optical transceivers at 5.12 Gbps per channel in a radiation field. We report the design, quality control in production and ageing test of the transceivers fabricated with the LOCld laser driver and multi-mode 850 nm vertical-cavity surface-emitting laser (VCSEL). The modules are packaged in miniature formats of dual-channel transmitter (MTx) and transceiver (MTRx) for the LAr. The transmitters are also packaged in s…
The trigger selection capabilities of the ATLAS detector have been significantly enhanced for the LHC Run- 2 in order to cope with the higher event rates and with the large number of simultaneous interactions (pile-up) per protonproton bunch crossing. A new hardware system, designed to analyse real time event-topologies at Level-1 came to full use in 2017. A hardware-based track reconstruction system, expected to be used real-time in 2018, is designed to provide track information to the high-level software trigger at its full input rate. The high-level trigger selections are largely relying on…
A Liquid-argon Trigger Digitizer Board (LTDB) is being developed to upgrade the ATLAS Liquid Argon Calorimeter Phase-I trigger electronics. The LTDB located at the front end needs to obtain the clock signals and be configured and monitored remotely from the back end. A clock and control system is being developed for the LTDB and the major functions of the system have been evaluated. The design and evaluation of the clock and control system are presented in this paper.
ATLAS detector at the LHC will undergo a major Phase-II upgrade for the High Luminosity LHC. The upgrade affects all major ATLAS systems, including the Trigger and Data Acquisition systems. As part of the Level-0 Trigger System, the Global Trigger uses full-granularity calorimeter cells to perform algorithms, refines the trigger objects and applies topological requirements. The Global Trigger uses a Global Common Module as the building block of its design. To achieve a high input and output bandwidth and substantial processing power, the Global Common Module will host the most advanced FPGAs a…
The LHC upgrade is planned to enhance the instantaneous luminosity during Run 3 from 2021 through 2023. The Phase-I upgrade of the trigger readout electronics for the ATLAS Liquid Argon (LAr) Calorimeters will be installed during the second long shutdown of LHC in 2019-2020. In this upgrade, the so-called super cells are introduced to provide higher granularity, higher resolution and longitudinal shower shape information from the LAr calorimeters to the level-1 trigger processors. A new LAr Trigger Digitizer Board (LTDB) will manipulate and digitize 320 channels of super cell signals, and tran…
This paper reports on the development of a resource-efficient FPGA-based neural network regression model for potential applications in the future hardware muon trigger system of the ATLAS experiment at the Large Hadron Collider (LHC). Effective real-time selection of muon candidates is the cornerstone of the ATLAS physics programme. With the planned ATLAS upgrades for the High Luminosity LHC, an entirely new FPGA-based hardware muon trigger system will be installed that will process full muon detector data within a 10 $μs$ latency window. The large FPGA devices planned for this upgrade should …
After the current shutdown, the LHC is about to resume operation for a new data-taking period, when it will operate with increased luminosity, event rate and center of mass energy. The new conditions will impose more demanding constraints on the ATLAS online trigger reconstruction and selection system. To cope with such increased constraints, the ATLAS High-Level Trigger, placed after a first hardware-based Level 1 trigger, has been redesigned by merging two previously separated software-based processing levels. In the new joint processing level, the algorithms run in the same computing nodes,…
The performance of the ATLAS muon trigger system is evaluated with proton-proton ($pp$) and heavy-ion (HI) collision data collected in Run 2 during 2015-2018 at the Large Hadron Collider. It is primarily evaluated using events containing a pair of muons from the decay of $Z$ bosons to cover the intermediate momentum range between 25 GeV and 100 GeV. Overall, the efficiency of the single-muon triggers is about 68 % in the barrel region and 85% in the endcap region. The $p_{\text{T}}$ range for efficiency determination is extended by using muons from decays of $J/ψ$ mesons, $W$ bosons, and top q…
The LHC is expected to increase its center-of-mass energy from 13 TeV to 14 TeV for Run 3 scheduled from 2022 to 2024. After Run 3, upgrades for the High-Luminosity-LHC (HL-LHC) programme are planned and the operation will start in 2027, increasing the instantaneous luminosity to 5.0 -- 7.5 times its nominal luminosity. Continuous upgrades of the ATLAS trigger system are planned to cope with the high event rate and to keep the physics acceptance. During the long shutdown period before Run 3, new detectors will be installed to improve the trigger performance. New trigger logic, combining inform…
The High-Luminosity LHC will provide the unique opportunity to explore the nature of physics beyond the Standard Model of strong and electroweak interactions. Highly selective first level triggers are essential for the physics programme of the ATLAS experiment at the HL-LHC where the instantaneous luminosity will exceed the LHC Run 1 instantaneous luminosity by almost an order of magnitude. The ATLAS first level muon trigger rate is dominated by low momentum muons, selected due to the moderate momentum resolution of the resistive plate and thin gap trigger chambers. This limitation can be over…
The Level-1 Muon Barrel Trigger of the ATLAS Experiment at LHC makes use of Resistive Plate Chamber (RPC) detectors. The on-detector trigger electronics modules are able to identify muons with predefined transverse momentum values (pT) by executing a coincidence logic on signals coming from the various detector layers. Then, on-detector trigger boards transfer trigger data to the off-detector electronics. A complex trigger system processes the incoming data by combining trigger information from the Barrel and the End-cap regions, and by providing the combined muon candidate to the Central Trig…
A new Muon-to-Central-Trigger Processor Interface (MUCTPI) was built as part of the upgrade of the ATLAS Level-1 trigger system for the next Run of the Large Hadron Collider at CERN. The MUCTPI has 208 high-speed optical serial links for receiving muon candidates from the muon trigger detectors. Three high-end FPGAs are used for real-time processing of the muon candidates, for sending trigger information to other parts of the trigger system, and for sending summary information to the data acquisition and monitoring system. A System-on-Chip (SoC) is used for the control, configuration and monit…
The Large Hadron Collider (LHC) at CERN plans to have a series of upgrades to increase its instantaneous luminosity to 7.5 the nominal luminosity. The increased luminosity drastically impacts the ATLAS trigger and readout data rates. The inner-most station of the ATLAS muon spectrometer, the so-called Small Wheels is being replaced with a New Small Wheel (NSW) system, consisting of Micromegas and small-strip Thin Gap Chambers (sTGC) detectors. The on-detector radiation levels required radiation tolerant electronics. The lower radiation levels on the rim of the NSW allowed utilizing commercial …
During the next major shutdown (2019-2020), the ATLAS experiment at the LHC will adopt the Front-End Link eXchange (FELIX) system as the interface between the data acquisition, detector control and TTC (Timing, Trigger and Control) systems and new or updated trigger and detector front-end electronics. FELIX will function as a router between custom serial links from front-end ASICs and FPGAs to data collection and processing components via a commodity switched network. Links may aggregate many slower links or be a single high bandwidth link. FELIX will also forward the LHC bunch-crossing clock,…
Hardware-based track reconstruction in the CMS and ATLAS trigger systems for the High-Luminosity LHC upgrade will provide unique capabilities. An overview is presented of earlier track trigger systems at hadron colliders, in particular for the Tevatron CDF and D0 experiments. We discuss the plans of the CMS and ATLAS experiments to implement hardware-based track reconstruction for the High-Luminosity LHC. Particular focus is placed on the track trigger capability of the upgraded CMS experiment. We discuss the challenges and opportunities of this novel handle, and review the alternatives that w…
Particle physicists at the Large Hadron Collider investigate the properties of matter at subatomic length scales by colliding together bunches of high-energy protons and observing the decay products of the collisions. ATLAS is one of two general-purpose detectors that reconstruct the interactions and, as part of a wide range of physics goals, measure the production of Higgs bosons and searches for exotic new phenomena including supersymmetry, extra dimensions of spacetime, and dark matter. Selecting the interesting collision events using hardware- and software-based triggers is a major challen…
