arXiv 1806.091612018-06-26physics.ins-dethep-ex

LHC ATLAS实验一级μ介子桶触发器的第一阶段改进

The Phase-1 Upgrade for the Level-1 Muon Barrel Trigger of the ATLAS Experiment at LHC

V. Izzo, A. Aloisio, R. Giordano, S. Perrella, R. Vari

摘要：

LHC ATLAS实验的一级μ子桶触发器使用电阻板室（RPC）探测器。探测器上触发电子模块能够通过对来自各个探测器层的信号执行符合逻辑来识别具有预定义横向动量值（pT）的μ子。然后，探测器上的触发板将触发数据传输到探测器外的电子设备。复杂的触发系统通过组合来自桶和端盖区域的触发信息并通过将组合的μ子候选者提供给中央触发处理器（CTP）来处理传入数据。近十年来，一级触发器系统一直运行良好，尽管对触发效率和性能的要求具有挑战性，并且LHC的亮度不断增加。为了应付这些限制，已经对整个触发系统进行了各种升级，并计划在今后几年内安装其他系统。触发系统的大多数升级依赖于最先进的技术，从而可以增加处理能力和数据传输带宽，并设计更复杂的触发菜单。因此，系统可能会选择更多的触发候选项，从而支持新的物理研究或拓扑选择。在这项工作中，我们讨论了新的桶接口板的第一个原型的设计，围绕Xilinx FPGA，这将被用来传输RPC触发数据的CTP系统。该板的主要要求是支持具有固定延迟的触发数据的光传输，并允许实现新的触发算法。我们描述的硬件实现和第一次功能和集成测试的结果。

英文摘要：

The Level-1 Muon Barrel Trigger of the ATLAS Experiment at LHC makes use of Resistive Plate Chamber (RPC) detectors. The on-detector trigger electronics modules are able to identify muons with predefined transverse momentum values (pT) by executing a coincidence logic on signals coming from the various detector layers. Then, on-detector trigger boards transfer trigger data to the off-detector electronics. A complex trigger system processes the incoming data by combining trigger information from the Barrel and the End-cap regions, and by providing the combined muon candidate to the Central Trigger Processor (CTP). For almost a decade, the Level-1 Trigger system has been operating very well, despite the challenging requirements on trigger efficiency and performance, and the continuously increasing LHC luminosity. In order to cope with these constraints, various upgrades for the full trigger system were already deployed, and others have been designed to be installed in the next years. Most of the upgrades to the trigger system rely on state-of-the-art technologies, thus allowing to increase the processing power and data transfer bandwidth, and to design more complex trigger menus. As a consequence, more trigger candidates might be selected by the system, thus supporting new physics studies or topological selections. In this work, we discuss the design of the first prototype of the new Barrel Interface Board, designed around a Xilinx FPGA, which will be used to transfer RPC trigger data to the CTP system. The main requirement for the board is to support the optical transmission of the trigger data with fixed latency and to allow the implementation of new trigger algorithms. We describe the hardware implementation and the results of the first functional and integration tests.

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