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arXiv 2301.04888cs.CRcs.SYeess.SY
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IoT中基于码的密码学:HQC的HW/SW协同设计

Code-based Cryptography in IoT: A HW/SW Co-Design of HQC

Maximilian Schöffel, Johannes Feldmann, Norbert Wehn

摘要:

量子计算的最新进展对广泛使用的公钥密码系统的安全性构成了严重威胁。因此,新的后量子密码算法已经被提出作为相关的美国NIST过程的一部分,以实现量子计算时代的安全加密通信。许多用于结构化基于格的算法的硬件加速器已经发布,以满足低功耗物联网边缘设备的严格功耗,面积和延迟要求。然而,这些算法的安全性仍然不确定。目前,针对格结构的新攻击被研究,以判断其安全性。相比之下,基于代码的算法依赖于深入探索的安全指标,并且在NIST过程中是有吸引力的候选者,由于最先进的软件实现的计算复杂性和内存占用,尚未在物联网的背景下进行相同深度的研究。在本文中,我们提出了最好的我们所知的第一个硬件/软件协同设计基于实现的代码为基础的汉明准循环密钥封装机制。我们配置文件和评估该算法,以探索软件优化,紧耦合的硬件加速指令集扩展和模块化,松耦合的加速器之间的权衡。我们提供了详细的结果,我们的设计的能耗和性能,并将其与现有的实现格和代码为基础的算法。该设计采用FPGA和ASIC两种技术实现。我们的研究结果表明,从实现的角度来看,基于代码的算法是低功耗物联网的有效替代方案。

英文摘要:

Recent advances in quantum computing pose a serious threat on the security of widely used public-key cryptosystems. Thus, new post-quantum cryptographic algorithms have been proposed as part of the associated US NIST process to enable secure, encrypted communication in the age of quantum computing. Many hardware accelerators for structured lattice-based algorithms have already been published to meet the strict power, area and latency requirements of low-power IoT edge devices. However, the security of these algorithms is still uncertain. Currently, many new attacks against the lattice structure are investigated to judge on their security. In contrast, code-based algorithms, which rely on deeply explored security metrics and are appealing candidates in the NIST process, have not yet been investigated to the same depth in the context of IoT due to the computational complexity and memory footprint of state-of-the-art software implementations. In this paper, we present to the best of our knowledge the first HW/SW co-design based implementation of the code-based Hamming Quasi Cyclic Key-Encapsulation Mechanism. We profile and evaluate this algorithm in order to explore the trade-off between software optimizations, tightly coupled hardware acceleration by instruction set extension and modular, loosely coupled accelerators. We provide detailed results on the energy consumption and performance of our design and compare it to existing implementations of lattice- and code-based algorithms. The design was implemented in two technologies: FPGA and ASIC. Our results show that code-based algorithms are valid alternatives in low-power IoT from an implementation perspective.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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