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arXiv 2301.04847cs.CVeess.IV
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面向4K/UHD视频流的半全局匹配立体视觉算法的实时FPGA实现

Real-time FPGA implementation of the Semi-Global Matching stereo vision algorithm for a 4K/UHD video stream

AGH University of Science and Technology(AGH科技大学)

Mariusz Grabowski, Tomasz Kryjak

AI总结:

本文提出一种实时FPGA实现的SGM立体视觉算法,支持4K/超高清视频流(4ppc格式,64像素视差),在Xilinx VC707开发板上验证,结果与原始设计相当。

摘要:

本文提出了一种半全局匹配(SGM)立体视觉算法的实时FPGA实现。所设计的模块支持4K/超高清(3840×2160像素@30帧每秒)视频流,采用每时钟4像素(4ppc)格式,视差范围为64像素。为处理4ppc格式的像素并满足时序约束,对基线SGM实现进行了修改,但我们的版本提供了与原始设计相当的结果。该方案已在搭载Virtex-7 FPGA的Xilinx VC707开发板上得到积极评估。

英文摘要:

In this paper, we propose a real-time FPGA implementation of the Semi-Global Matching (SGM) stereo vision algorithm. The designed module supports a 4K/Ultra HD (3840 x 2160 pixels @ 30 frames per second) video stream in a 4 pixel per clock (ppc) format and a 64-pixel disparity range. The baseline SGM implementation had to be modified to process pixels in the 4ppc format and meet the timing constrains, however, our version provides results comparable to the original design. The solution has been positively evaluated on the Xilinx VC707 development board with a Virtex-7 FPGA device.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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