多层电阻存储器的信息密度
Information Density in Multi-Layer Resistive Memories
摘要：
电阻式存储器将信息存储在双端子器件的交叉布置中，该交叉布置可以被编程为高电阻或低电阻的模式。虽然非常紧凑，但这种技术存在“潜行路径”问题：某些信息模式无法恢复，因为并联的多个低电阻使高电阻与低电阻无法区分。本文考虑了一种多层器件，精确地推导了它所能存储的比特数，并给出了其渐近界。在单层和多层的情况下，有和没有外围选择电路的一系列孤立的阵列与极端的纵横比的信息密度。这种密度被证明是非零的限制，不像以前考虑的具有中等纵横比的阵列。一个简单的编码方案，实现容量渐近。
英文摘要：
Resistive memories store information in a crossbar arrangement of two-terminal devices that can be programmed to patterns of high or low resistance. While extremely compact, this technology suffers from the "sneak-path" problem: certain information patterns cannot be recovered, as multiple low resistances in parallel make a high resistance indistinguishable from a low resistance. In this paper, a multi-layer device is considered, and the number of bits it can store is derived exactly and asymptotic bounds are developed. The information density of a series of isolated arrays with extreme aspect ratios is derived in the single- and multi-layer cases with and without peripheral selection circuitry. This density is shown to be non-zero in the limit, unlike that of the arrays with moderate aspect ratios previously considered. A simple encoding scheme that achieves capacity asymptotically is presented.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
