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arXiv 2007.11734cond-mat.mes-hallcond-mat.supr-conphysics.app-ph
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利用三维铌纳米超导量子干涉器件实现超导存储单元的小型化

Miniaturization of the Superconducting Memory Cell via a Three-Dimensional Nb Nano-Superconducting Quantum Interference Device

Lei Chen, Lili Wu, Yue Wang, Yinping Pan, Denghui Zhang, Junwen Zeng, Xiaoyu Liu, Linxian Ma, Wei Peng, Yihua Wang, Jie Ren, Zhen Wang

摘要:

长期以来,人们一直希望能够匹配超导逻辑电路速度的可扩展存储器能够实现超导计算机。包括约瑟夫森结的超导回路可以在皮秒内存储通量量子态。然而,要求环路电感产生双态滞后对单个存储器单元占用的最小面积设置了限制。在这里,我们提出了一个小型化的超导存储单元的基础上的三维(3D)铌纳米超导量子干涉仪(nano-SQUID)。这里的主要单元面积适合8*9 μm^2的矩形,具有用于存储器实现的交叉选择功能。由于3D纳米SQUID的大调制深度(~66%),该单元显示出由偏置电流扫描产生的两个相邻通量量子态之间的周期性可调滞后。此外,所测得的纳米SQUID的电流-相位关系(CPR)示出从正弦函数,如理论建模所预测的。三维纳米SQUID的偏度与临界电流呈线性相关。它还发现,滞后回线的大小是在一个线性缩放关系的CPR偏度使用的统计数据,从表征的26个设备。我们证明了CPR偏度范围为π/4~3π/4等效于一个大的环路电感,为存储器实现创造了一个稳定的双态滞后。因此,3D nano-SQUID的偏斜CPR能够通过克服回路区域的电感限制而进一步实现超导存储单元的小型化。

英文摘要:

Scalable memories that can match the speeds of superconducting logic circuits have long been desired to enable a superconducting computer. A superconducting loop that includes a Josephson junction can store a flux quantum state in picoseconds. However, the requirement for the loop inductance to create a bi-state hysteresis sets a limit on the minimal area occupied by a single memory cell. Here, we present a miniaturized superconducting memory cell based on a Three-Dimensional (3D) Nb nano-Superconducting QUantum Interference Device (nano-SQUID). The major cell area here fits within an 8*9 μm^2 rectangle with a cross-selected function for memory implementation. The cell shows periodic tunable hysteresis between two neighbouring flux quantum states produced by bias current sweeping because of the large modulation depth of the 3D nano-SQUID (~66%). Furthermore, the measured Current-Phase Relations (CPRs) of nano-SQUIDs are shown to be skewed from a sine function, as predicted by theoretical modelling. The skewness and the critical current of 3D nano-SQUIDs are linearly correlated. It is also found that the hysteresis loop size is in a linear scaling relationship with the CPR skewness using the statistics from characterisation of 26 devices. We show that the CPR skewness range of π/4~3π/4 is equivalent to a large loop inductance in creating a stable bi-state hysteresis for memory implementation. Therefore, the skewed CPR of 3D nano-SQUID enables further superconducting memory cell miniaturization by overcoming the inductance limitation of the loop area.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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