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arXiv 2005.02601cs.ITmath.IT
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电阻式随机存取存储器信道的性能极限和编码方案

Performance Limit and Coding Schemes for Resistive Random-Access Memory Channels

Guanghui Song, Kui Cai, Xingwei Zhong, Jiang Yu, Jun Cheng

摘要:

电阻式随机存取存储器(ReRAM)由于其简单的读写操作和高存储密度而成为下一代非易失性存储器技术的有希望的候选者。然而,它的交叉阵列结构会引起严重的干扰效应,称为“潜路径”。“在本文中,我们提出了信道编码技术,可以减轻潜行路径干扰和信道噪声。主要的挑战是潜路径干扰是数据相关的,并且在存储器阵列内也是相关的,因此传统的纠错编码方案将是不够的。在这项工作中,我们提出了一种跨阵列编码策略,将码字分配给多个独立的存储器阵列,并利用实时信道估计方案来估计ReRAM信道的瞬时状态。由于来自不同阵列的编码比特经历独立的信道,因此在解码期间可以获得“分集”增益,并且当码字被适当地分布在不同存储器阵列上时,代码实际上执行为在不相关信道上的代码。通过基于将干扰视为噪声(TIN)的方案执行解码,不同存储器阵列上的ReRAM信道等效于我们定义的块变化信道,为此我们提出了容量界限和编码方案。所提出的编码方案由优化的纠错码与数据整形器的串行级联组成,这使得ReRAM系统能够实现接近容量极限的存储效率。

英文摘要:

Resistive random-access memory (ReRAM) is a promising candidate for the next generation non-volatile memory technology due to its simple read/write operations and high storage density. However, its crossbar array structure causes a severe interference effect known as the "sneak path." In this paper, we propose channel coding techniques that can mitigate both the sneak-path interference and the channel noise. The main challenge is that the sneak-path interference is data-dependent, and also correlated within a memory array, and hence the conventional error correction coding scheme will be inadequate. In this work, we propose an across-array coding strategy that assigns a codeword to multiple independent memory arrays, and exploit a real-time channel estimation scheme to estimate the instantaneous status of the ReRAM channel. Since the coded bits from different arrays experience independent channels, a "diversity" gain can be obtained during decoding, and when the codeword is adequately distributed over different memory arrays, the code actually performs as that over an uncorrelated channel. By performing decoding based on the scheme of treating-interference-as-noise (TIN), the ReRAM channel over different memory arrays is equivalent to a block varying channel we defined, for which we propose both the capacity bounds and a coding scheme. The proposed coding scheme consists of a serial concatenation of an optimized error correction code with a data shaper, which enables the ReRAM system to achieve a near capacity limit storage efficiency.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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