片上系统协议栈的后硅迹分析方法
A Post-Silicon Trace Analysis Approach for System-on-Chip Protocol Debug
摘要：
从硅迹线重构系统级行为是片上系统设计的硅后验证中的关键问题。目前这一领域的工业实践主要是手工操作，这取决于建筑师、设计师和验证者的协作见解。本文提出了一种跟踪分析方法，利用系统级协议的架构模型，从部分观察到的硅迹线中存在的模糊和嘈杂的数据重建设计行为。该方法的输出是一组抽象到系统级协议的系统内部执行的所有潜在解释。为了支持跟踪分析方法，一个同伴跟踪信号选择框架的系统级协议的指导下，还提出了，其复杂性和准确性的分析方法的影响进行了讨论。该方法和框架已经在一个多核片上系统原型上进行了评估，该原型实现了一组常见的工业系统级协议。
英文摘要：
Reconstructing system-level behavior from silicon traces is a critical problem in post-silicon validation of System-on-Chip designs. Current industrial practice in this area is primarily manual, depending on collaborative insights of the architects, designers, and validators. This paper presents a trace analysis approach that exploits architectural models of the system-level protocols to reconstruct design behavior from partially observed silicon traces in the presence of ambiguous and noisy data. The output of the approach is a set of all potential interpretations of a system's internal executions abstracted to the system-level protocols. To support the trace analysis approach, a companion trace signal selection framework guided by system-level protocols is also presented, and its impacts on the complexity and accuracy of the analysis approach are discussed. That approach and the framework have been evaluated on a multi-core system-on-chip prototype that implements a set of common industrial system-level protocols.
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