This article reports the first operation of a double-sided CMOS pixelated ladder in a collider experiment, namely in the inner tracker volume of the Belle II experiment during the Phase 2 run of the SuperKEKB collider. Design and integration of the detector system in the experiment interaction region is first described. The two modules operated almost continuously during slightly more than four months, recording data for the monitoring of the hit rate close to beams. Details of the off-line data analysis are provided and a method to estimate particle momentum from the 2 hits measured per crossing particle is proposed.
Development of a Neutron Imager using CMOS Pixelated Sensor
The University of Tokyo（东京大学）；High Energy Accelerator Research Organization (KEK)（高能加速器研究机构（KEK））；The Graduate University for Advanced Studies (SOKENDAI)（高级研究院（SOKENDAI））；Tohoku University（东北大学）；Shiga University（滋贺大学）
The development of ultra-light pixelated ladders is motivated by the requirements of the ILD vertex detector at ILC. This paper summarizes three projects related to system integration. The PLUME project tackles the issue of assembling double-sided ladders. The SERWIETE project deals with a more innovative concept and consists in making single-sided unsupported ladders embedded in an extra thin plastic enveloppe. AIDA, the last project, aims at building a framework reproducing the experimental running conditions where sets of ladders could be tested.
\textit{Topmetal-${II}^-$} is a low noise CMOS pixel direct charge sensor with a pitch of 83$μm$. CdZnTe is an excellent semiconductor material for radiation detection. The combination of CdZnTe and the sensor makes it possible to build a detector with high spatial resolution. In our experiments, an epoxy adhesive is used as the conductive medium to connect the sensor and Cadmium Zinc Telluride (CdZnTe). The diffusion coefficient and charge efficiency of electrons are measured at a low bias voltage of -2 Volts, and the image of a single alpha is clear with a reasonable spatial resolution. The …
Highly pixelated solid-state detectors offer outstanding capabilities in the identification and suppression of backgrounds from natural radioactivity. We present the background-identification strategies developed for the DAMIC experiment, which employs silicon charge-coupled devices to search for dark matter. DAMIC has demonstrated the capability to disentangle and measure the activities of every $β$ emitter from the $^{32}$Si, $^{238}$U and $^{232}$Th decay chains in the silicon target. Similar strategies will be adopted by the Selena Neutrino Experiment, which will employ hybrid amorphous $^…
Using industrial standard 0.35μm CMOS Integrated Circuit process, we realized a highly pixelated sensor that directly collects charge via metal nodes placed on the top of each pixel and forms two dimensional images of charge cloud distribution. The first version, Topmetal-I, features a 64x64 pixel array of 80μm pitch size. Direct charge calibration reveals an average capacitance of 210fF per pixel. The charge collection noise is near the thermal noise limit. With the readout, individual pixel channels exhibit a most probable equivalent noise charge of 330e-.
A prototype of the CMOS pixel sensor named SUPIX-1 has been fabricated and tested in order to investigate the feasibility of a pixelated tracker for a proposed Higgs factory, namely, the Circular Electron-Positron Collider (CEPC). The sensor, taped out with a 180 nm CMOS Image Sensor (CIS) process, consists of nine different pixel arrays varying in pixel pitches, diode sizes and geometries in order to study the particle detection performance of enlarged pixels. The test was carried out with a Fe-55 radioactive source. Two soft X-ray peaks observed were used to calibrate the charge to voltage f…
We present the development of a single-photon detector and the connected read-out electronics. This `hybrid' detector is based on a vacuum tube, transmission photocathode, microchannel plate and a pixelated CMOS read-out anode encapsulating the analog and digital-front end electronics. This assembly will be capable of detecting up to $10^9$ photons per second with simultaneous measurement of position and time. The pixelated read-out anode used is based on the Timepix4 ASIC ($65~\mathrm{nm}$ CMOS technology) designed in the framework of the Medipix4 collaboration. This ASIC is an array of $512\…
Development and characterization of hybrid MCP-PMT with embedded Timepix4 ASIC used as pixelated anode
INFN, Division of Ferrara（意大利国家核物理研究所费拉拉分部）；Dept. of Physics and Earth Science, University of Ferrara（费拉拉大学地球科学与物理学系）；EP Department, CERN（欧洲核子研究中心实验物理部）
The CLIC Tracker Detector (CLICTD) is a monolithic pixelated sensor chip produced in a $180$ nm imaging CMOS process built on a high-resistivity epitaxial layer. The chip, designed in the context of the CLIC tracking detector study, comprises a matrix of ${16\times128}$ elongated pixels, each measuring ${300\times30}$ $μ$m$^2$. To ensure prompt charge collection, every elongated pixel is segmented in eight sub-pixels, each containing a collection diode and a separate analog front-end. A simultaneous $8$-bit time measurement with $10$ ns time bins and $5$-bit energy measurement with programmabl…
We report on the experimental study made on a successive prototype of High-Voltage CMOS (HV-CMOS) ATLASPix2 sensor for the tracking detector application, developed with 180 nm feature size. These sensors are to qualify mainly the peripheral data processing blocks (e.g. Command Decoder, Trigger Buffer, etc.). It is a smaller version of 24 X 36 pixelated sensor in comparison to the earlier generation of ATLASPix1 fabricated in both ams AG, Austria, and TSI Semiconductors, USA. While ams produced ATLASPix2 showed breakdown voltage 50 V in nonirradiated condition as it was seen on its predecessors…
This contribution investigates a prototype of a TPC readout with a highly pixelated CMOS ASIC, which is an option for charged particles tracking of the ILC. A triple GEM stack was joined with a TimePix and MediPix2 chip (pixel size of 55$\times$55 $μm^2$) and its readout properties were investigated with 5 GeV electrons. The spatial resolution of the cluster center reconstruction was determined as a function of drift distance using different cluster alhoritms and compared with Monte Carlo predictions.
The recent development of electron sensitive and pixelated detectors has attracted the use of four-dimensional scanning transmission electron microscopy (4D-STEM). Here, we present a precession electron diffraction assisted 4D-STEM technique for automated orientation mapping using diffraction spot patterns directly captured by an in-column scintillator based complementary metal-oxide-semiconductor (CMOS) detector. We compare the results to a conventional approach, which utilizes a fluorescent screen filmed by an external CCD camera. The high dynamic range and signal-to-noise characteristics of…
A CMOS pixel sensor, named Supix-1, is developed for a pixelated silicon tracker for the Circular Electron-Positron Collider (CEPC) project. The sensor, consisted of nine sectors varying in pixel sizes, diode sizes and geometries, is fabricated with a 180 nm CMOS Image Sensor (CIS) process to study the particle detection performance of enlarged pixels. In this work, the radiation-induced effects on the charge collection of the sensor under the fluence of 1 $\times$ 10^13 1 MeV neq/cm^2 are studied by the measurements with the radioactive source of Fe-55 and the Technology Computer Aided Design…
CMOS Pixel Sensors are making steady progress towards the specifications of the ILD vertex detector. Recent developments are summarised, which show that these devices are close to comply with all major requirements, in particular the read-out speed needed to cope with the beam related background. This achievement is grounded on the double- sided ladder concept, which allows combining signals generated by a single particle in two different sensors, one devoted to spatial resolution and the other to time stamp, both assembled on the same mechanical support. The status of the development is overv…
The development of an innovative position sensitive pixelated sensor to detect and measure with high precision the coordinates of the ionizing particles is proposed. The silicon avalanche pixel sensors (APiX) is based on the vertical integration of avalanche pixels connected in pairs and operated in coincidence in fully digital mode and with the processing electronics embedded on the chip. The APiX sensor addresses the need to minimize the material budget and related multiple scattering effects in tracking systems requiring a high spatial resolution in the presence of a large occupancy. The ex…
Imaging sensors made from an ionization target layer of amorphous selenium (aSe) coupled to a silicon complementary metal-oxide-semiconductor (CMOS) active pixel array for charge readout are a promising technology for neutrino physics. The high spatial resolution in a solid-state target provides unparalleled rejection of backgrounds from natural radioactivity in the search for neutrinoless $ββ$ decay and for solar neutrino spectroscopy with $^{82}$Se. We present results on the ionization response of aSe measured from the photoabsorption of 122 keV $γ$ rays in a single-pixel device. We report o…
IDeF-X HD is a 32-channel analog front-end with self-triggering capability optimized for the readout of 16 x 16 pixels CdTe or CdZnTe pixelated detectors to build low power micro gamma camera. IDeF-X HD has been designed in the standard AMS CMOS 0.35 microns process technology. Its power consumption is 800 micro watt per channel. The dynamic range of the ASIC can be extended to 1.1 MeV thanks to the in-channel adjustable gain stage. When no detector is connected to the chip and without input current, a 33 electrons rms ENC level is achieved after shaping with 10.7 micro seconds peak time. Spec…
We discuss two projects exploring the integration of thin CMOS pixel sensors in order to prototype ladders matching the geometry needed for the ILD vertex detector. The PLUME project has designed and fabricated full-size and fully functional double- sided layers which currently reach 0.6 % X0 and aim for 0.3 % X0 in mid-2012. Another approach, SERNWIETE, consists in wrapping the sensors in a polyimide-based micro-cable to obtain a supportless single-sided ladder with a material budget around 0.15 % X0. First promising samples have been produced and the full-size prototype is expected in spring…
The Belle II experiment at the SuperKEKB collider in Japan is designed to indirectly probe new physics using approximately 50 times the data recorded by its predecessor. An accurate determination of the decay-point position of subatomic particles such as beauty and charm hadrons as well as a precise measurement of low-momentum charged particles will play a key role in this pursuit. These will be accomplished by an inner tracking device comprising two layers of pixelated silicon detector and four layers of silicon vertex detector based on double-sided microstrip sensors. We describe herein the …
We present our latest ASIC, which is used for the readout of Cadmium Telluride double-sided strip detectors (CdTe DSDs) and high spectroscopic imaging. It is implemented in a 0.35 um CMOS technology (X-Fab XH035), consists of 64 readout channels, and has a function that performs simultaneous AD conversion for each channel. The equivalent noise charge of 54.9 e- +/- 11.3 e- (rms) is measured without connecting the ASIC to any detectors. From the spectroscopy measurements using a CdTe single-sided strip detector, the energy resolution of 1.12 keV (FWHM) is obtained at 13.9 keV, and photons withi…
In September 2008 the Slim5 collaboration submitted a low material budget silicon demonstrator to test with 12 GeV/c protons, at the PS-T9 test-beam at CERN. Inside the reference telescope, two different detectors were placed as device under test (DUT). The first was a 4k-Pixel Matrix of Deep N Well MAPS, developed in a 130 nm CMOS Technology, providing digital sparsified readout. The other one was a high resistivity double sided silicon detector, with short strips at 45-degree angle to the detector's edge, read out by the FSSR2 chip. The FSSR2 is a 128 channel data-driven fast readout chip de…
SpaceWire-based Data Acquisition Network for the Solar Flare Sounding Rocket Experiment FOXSI-4 and FOXSI-5
Space Sciences Laboratory, University of California, Berkeley（加州大学伯克利分校空间科学实验室）；Department of Physics, The University of Tokyo（东京大学物理学系）；Kavli Institute for the Physics and Mathematics of the Universe (Kavli IPMU, WPI), The University of Tokyo（东京大学宇宙数学国际中心（Kavli IPMU，WPI））；University of Minnesota, Twin Cities（明尼苏达大学双城分校）；Department of Space and Astronautical Science, The Graduate University for Advanced Studies, SOKENDAI（高级研究院天体宇宙科学系（SOKENDAI））；Institute of Space and Astronautical Science, Japan Aerospace Exploration Agency (ISAS/JAXA)（日本宇宙航空研究开发机构宇宙科学研究所（ISAS/JAXA））；International Center for Quantum-field Measurement Systems for Studies of the Universe and Particles (QUP, WPI), KEK（高能加速器研究机构量子场测量系统国际中心（QUP，WPI））；National Astronomical Observatory of Japan（日本国立天文台）
