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arXiv 1108.1127cond-mat.mtrl-sci
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用于高性能纳米级晶体管的绝缘层上超薄化合物半导体

Ultrathin compound semiconductor on insulator layers for high performance nanoscale transistors

Hyunhyub Ko, Kuniharu Takei, Rehan Kapadia, Steven Chuang, Hui Fang, Paul W. Leu, Kartik Ganapathi, Elena Plis, Ha Sul Kim, Szu-Ying Chen, Morten Madsen, Alexan… 展开作者

Hyunhyub Ko, Kuniharu Takei, Rehan Kapadia, Steven Chuang, Hui Fang, Paul W. Leu, Kartik Ganapathi, Elena Plis, Ha Sul Kim, Szu-Ying Chen, Morten Madsen, Alexandra C. Ford, Yu-Lun Chueh, Sanjay Krishna, Sayeef Salahuddin, Ali Javey

摘要:

在过去的几年里,电子器件固有的缩放限制已经推动了高载流子迁移率半导体作为Si替代物的探索,以进一步提高器件性能。特别地,结合III-V族半导体的高迁移率和Si技术的成熟的低成本处理,已经积极地研究了异质集成在Si衬底上的化合物半导体。然而,这种整合带来了重大挑战。传统上,已经探索了在Si上异质外延生长复杂多层膜。除了复杂性,高缺陷密度和结漏电流的方法提出的限制。出于这一挑战,在这里,我们利用外延转移方法的集成层的单晶InAs的Si/SiO2衬底。作为与绝缘体上硅(SOI)技术14类似的技术,我们使用缩写"XOI"来表示我们的复合绝缘体上半导体平台。通过实验和模拟,探讨了InAs XOI晶体管的电学特性,阐明了量子限制在InAs XOI层输运特性中的关键作用。重要的是,高品质的InAs/电介质界面是通过使用一种新的热生长的界面InAsOx层(~1 nm厚)。在VDS = 0.5V时,器件的通断电流比大于10,000,亚阈值摆幅为107-150 mV/decade,沟道长度约为0.5 μ m,峰值电流密度约为1.6 mS/μ m。

英文摘要:

Over the past several years, the inherent scaling limitations of electron devices have fueled the exploration of high carrier mobility semiconductors as a Si replacement to further enhance the device performance. In particular, compound semiconductors heterogeneously integrated on Si substrates have been actively studied, combining the high mobility of III-V semiconductors and the well-established, low cost processing of Si technology. This integration, however, presents significant challenges. Conventionally, heteroepitaxial growth of complex multilayers on Si has been explored. Besides complexity, high defect densities and junction leakage currents present limitations in the approach. Motivated by this challenge, here we utilize an epitaxial transfer method for the integration of ultrathin layers of single-crystalline InAs on Si/SiO2 substrates. As a parallel to silicon-on-insulator (SOI) technology14,we use the abbreviation "XOI" to represent our compound semiconductor-on-insulator platform. Through experiments and simulation, the electrical properties of InAs XOI transistors are explored, elucidating the critical role of quantum confinement in the transport properties of ultrathin XOI layers. Importantly, a high quality InAs/dielectric interface is obtained by the use of a novel thermally grown interfacial InAsOx layer (~1 nm thick). The fabricated FETs exhibit an impressive peak transconductance of ~1.6 mS/μm at VDS=0.5V with ON/OFF current ratio of greater than 10,000 and a subthreshold swing of 107-150 mV/decade for a channel length of ~0.5 μm.

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