我们提出并展示了一种用于量子点的弛豫SiGe/应变Si（SiGe/s-Si）增强型栅堆叠。追求增强型SiGe/s-Si结构是因为其将量子点与富含电荷和自旋缺陷的电介质界面隔开并使背景掺杂剂最小化。在霍尔棒中测量到在5.8 \times 10^{11}/cm ^2下的1.6 \times 10 ^5 cm ^2/Vs的迁移率，该霍尔棒见证了与量子点相同的器件工艺流程。在双顶栅横向量子点纳米结构中测量了周期性库仑阻塞（CB）。CB端接开放菱形，器件两端直流电压高达\pm 10 mV。该器件是在150 mm Si铸造环境中制造的，该环境使用注入欧姆和化学气相沉积欧姆，与先前展示的增强型SiGe/s-Si结构相比，该结构由AuSb合金欧姆和原子层沉积电介质制成。一个修改的注入，多晶硅形成和退火条件被用来最大限度地减少热预算，使掩埋的s-Si层不会被清洗出来的Ge/Si互扩散。
英文摘要：
We propose and demonstrate a relaxed-SiGe/strained-Si (SiGe/s-Si) enhancement-mode gate stack for quantum dots. The enhancement-mode SiGe/s-Si structure is pursued because it spaces the quantum dot away from charge and spin defect rich dielectric interfaces and minimizes background dopants. A mobility of 1.6\times10^5 cm^2/Vs at 5.8\times10^{11}/cm^2 is measured in Hall bars that witness the same device process flow as the quantum dot. Periodic Coulomb blockade (CB) is measured in a double-top-gated lateral quantum dot nanostructure. The CB terminates with open diamonds up to \pm 10 mV of DC voltage across the device. The devices were fabricated within a 150 mm Si foundry setting that uses implanted ohmics and chemical-vapor-deposited dielectrics, in contrast to previously demonstrated enhancement-mode SiGe/s-Si structures made with AuSb alloyed ohmics and atomic-layer-deposited dielectric. A modified implant, polysilicon formation and annealing conditions were utilized to minimize the thermal budget so that the buried s-Si layer would not be washed out by Ge/Si interdiffusion.
Buried germanium quantum well proximitised by magnetic field-resilient superconducting platinum iridium germanosilicide
Delft University of Technology（代尔夫特理工大学）；QuTech and Kavli Institute of Nanoscience, Delft University of Technology（代尔夫特理工大学量子纳米科学夸夫泰克研究所）；Kavli Institute of Nanoscience, Delft University of Technology（代尔夫特理工大学夸夫泰克纳米科学研究所）；Catalan Institute of Nanoscience and Nanotechnology – ICN2 (CSIC and BIST)（加泰罗尼亚纳米科学与技术研究所）；ICREA（加泰罗尼亚高级研究学院）
Undoped Strained Ge Quantum Well with Ultrahigh Mobility Grown by Reduce Pressure Chemical Vapor Deposition
采用反渐变技术在30 nm Ge0.8Si0.2浅势垒下制备了非掺杂Ge量子阱。下势垒由Ge_（0.8）Si_（0.2）→ Ge_（0.9）Si_（0.1）依次淀积，Ge含量的变化形成了一个尖锐的界面，可以抑制穿透到未掺杂Ge量子阱中的穿透位错密度。Ge_（0.8）Si_（0.2）势垒在Ge量子阱中引入了足够的面内平行应变-0.41%。具有浅埋沟道的异质结场效应晶体管在2.51 E-11 cm 2的低渗透密度下获得了超过2 E6 cm 2/Vs的高二维空穴气（2DHG）迁移率。我们还发现了在高密度和高磁场下可调谐的分数量子霍尔效应。这种方法将应变锗定义为提供用于调谐自旋轨道耦合强度以用于快速和相干量子计算的材料基础。
Characterization of carrier transport properties in strained crystalline Si wall-like structures as a function of scaling into the quasi-quantum regime
Light effective hole mass in undoped Ge/SiGe quantum wells
我们报道了非掺杂锗量子阱中密度相关的有效空穴质量测量。我们能够跨越大范围的密度（$2.0-11\times10^{11}$ cm $^{-2}$），在顶栅场效应晶体管通过定位在不同的深度的应变埋Ge沟道从表面的12和44 nm。从Shubnikov-de Haas振荡振幅的热阻尼，我们测量了密度为$2.2\times10^{11}$ cm $^{-2}$的$0.061m_e$的轻质量。我们证实了理论上预测的质量随密度增加的相关性，并通过外推法找到了$\sim0.05m_e$在零密度时的有效质量，这是在量子点中展示自旋量子位的平面平台的最轻有效质量。
