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arXiv 0812.3177cond-mat.mes-hallcond-mat.mtrl-sci
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纳米级电子器件的栅极耦合

Gate Coupling to Nanoscale Electronics

Sujit S. Datta, Douglas R. Strachan, A. T. Charlie Johnson

摘要:

单分子电子器件的实现,其中纳米级分子连接到宏观引线,需要可再现地产生高度有序的纳米级间隙,其中感兴趣的分子静电耦合到附近的栅电极。了解分子-栅极耦合如何取决于关键参数对于开发高性能器件至关重要。在这里,我们直接解决这个问题,提出了二维和三维有限元静电模拟的电极的几何形状形成使用新兴的制造技术。我们量化这些设备固有的栅极耦合,探索被认为是相关的这些设备的参数的作用。这些因素包括所用电介质的厚度和性质,以及由于不同器件几何形状而产生的栅极屏蔽。在单分子(~ 1 nm)尺度下,我们发现器件的几何形状对栅耦合的影响比介电常数和绝缘层的厚度更大。与设想的典型均匀纳米间隙电极几何形状相比,我们发现非均匀锥形电极在栅极耦合方面产生显著的三个数量级的改善。我们还发现,在锥形几何结构的分子通道的极化率的作品,以增强栅极耦合。

英文摘要:

The realization of single-molecule electronic devices, in which a nanometer-scale molecule is connected to macroscopic leads, requires the reproducible production of highly ordered nanoscale gaps in which a molecule of interest is electrostatically coupled to nearby gate electrodes. Understanding how the molecule-gate coupling depends on key parameters is crucial for the development of high-performance devices. Here we directly address this, presenting two- and three-dimensional finite-element electrostatic simulations of the electrode geometries formed using emerging fabrication techniques. We quantify the gate coupling intrinsic to these devices, exploring the roles of parameters believed to be relevant to such devices. These include the thickness and nature of the dielectric used, and the gate screening due to different device geometries. On the single-molecule (~1nm) scale, we find that device geometry plays a greater role in the gate coupling than the dielectric constant or the thickness of the insulator. Compared to the typical uniform nanogap electrode geometry envisioned, we find that non-uniform tapered electrodes yield a significant three orders of magnitude improvement in gate coupling. We also find that in the tapered geometry the polarizability of a molecular channel works to enhance the gate coupling.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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