arXivDaily arXiv每日学术速递 周一至周五更新
arXiv 0804.1172cs.ITmath.IT
收藏

低精度模数转换的收发器设计:信息论观点

Transceiver Design with Low-Precision Analog-to-Digital Conversion : An Information-Theoretic Perspective

Jaspreet Singh, Onkar Dabeer, Upamanyu Madhow

摘要:

现代通信接收机架构以数字信号处理(DSP)为中心,其中大部分接收机处理是对模数转换(ADC)之后获得的数字信号执行的。在本文中,我们探讨了香农理论的性能限制时,ADC精度急剧下降,从典型值的8-12位在当前的通信收发器中使用的,1-3位。目标是深入了解以DSP为中心的收发器架构在通信带宽扩展时是否可行,并认识到高采样率下的高精度ADC要么不可用,要么成本太高或功耗太大。具体而言,我们评估了理想的实离散时间加性高斯白噪声(AWGN)信道下,输入的平均功率约束的低精度ADC施加的通信限制。对于具有K个量化仓的ADC(即,精度为log 2 K位),我们表明,香农容量是可实现的离散输入分布,最多K + 1质量点。对于2 bin(1位)对称ADC,该结果经过收紧,以表明二进制对映信号对于任何信噪比(SNR)都是最佳的。对于多位ADC,通过数值计算计算容量,所得结果用于对低精度ADC的系统设计进行以下令人鼓舞的观察:(a)即使在高达20 dB的适度高SNR下,2-3比特量化也仅导致频谱效率降低10-20%,这对于大通信带宽是可接受的,(b)具有设置为实现最大似然硬判决的ADC阈值的标准等概率脉冲幅度调制在高SNR下是渐近最佳的,并且在低到中等SNR下也工作良好。

英文摘要:

Modern communication receiver architectures center around digital signal processing (DSP), with the bulk of the receiver processing being performed on digital signals obtained after analog-to-digital conversion (ADC). In this paper, we explore Shannon-theoretic performance limits when ADC precision is drastically reduced, from typical values of 8-12 bits used in current communication transceivers, to 1-3 bits. The goal is to obtain insight on whether DSP-centric transceiver architectures are feasible as communication bandwidths scale up, recognizing that high-precision ADC at high sampling rates is either unavailable, or too costly or power-hungry. Specifically, we evaluate the communication limits imposed by low-precision ADC for the ideal real discrete-time Additive White Gaussian Noise (AWGN) channel, under an average power constraint on the input. For an ADC with K quantization bins (i.e., a precision of log2 K bits), we show that the Shannon capacity is achievable by a discrete input distribution with at most K + 1 mass points. For 2-bin (1-bit) symmetric ADC, this result is tightened to show that binary antipodal signaling is optimum for any signal-to-noise ratio (SNR). For multi-bit ADC, the capacity is computed numerically, and the results obtained are used to make the following encouraging observations regarding system design with low-precision ADC : (a) even at moderately high SNR of up to 20 dB, 2-3 bit quantization results in only 10-20% reduction of spectral efficiency, which is acceptable for large communication bandwidths, (b) standard equiprobable pulse amplitude modulation with ADC thresholds set to implement maximum likelihood hard decisions is asymptotically optimum at high SNR, and works well at low to moderate SNRs as well.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

↑