基于二叉决策图的低功耗数字电路综合
Synthesis of Low-Power Digital Circuits Derived from Binary Decision Diagrams
摘要：
本文介绍了一种新的方法来综合数字电路的二叉决策图（BDD），可以产生的功耗降低。通过减少电路中的开关活动，同时密切关注作为优化标准的信息措施来实现功率降低。我们首先提出了有效的BDD为基础的计算技术的信息措施，用于指导功率优化程序。使用这种技术，我们已经开发出一种算法的BDD重新排序，从而导致减少来自BDD的电路的功耗。在ISCAS基准电路上的综合结果是非常令人鼓舞的。
英文摘要：
This paper introduces a novel method for synthesizing digital circuits derived from Binary Decision Diagrams (BDDs) that can yield to reduction in power dissipation. The power reduction is achieved by decreasing the switching activity in a circuit while paying close attention to information measures as an optimization criterion. We first present the technique of efficient BDD-based computation of information measures which are used to guide the power optimization procedures. Using this technique, we have developed an algorithm of BDD reordering which leads to reducing the power consumption of the circuits derived from BDDs. Results produced by the synthesis on the ISCAS benchmark circuits are very encouraging.
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