LUCAS：一款面向SiPM、针对ToF-CT的低功耗超低抖动紧凑型ASIC
LUCAS: A Low-Power Ultra-Low Jitter Compact ASIC for SiPM Targetting ToF-CT
AI总结：
本研究提出面向SiPM的ToF-CT模拟前端ASIC LUCAS，采用低阻抗前置放大器加电压比较器结构，65nm工艺实现，仿真显示抖动低于40ps、单通道功耗3.2mW，适配高事件率与高通道密度场景。
摘要：
我们提出了LUCAS（面向硅光电倍增管的低功耗超低抖动紧凑型专用集成电路），这是一款针对飞行时间计算机断层扫描（ToF-CT）中快速定时探测器的硅光电倍增管（SiPM）模拟前端。LUCAS采用极低输入阻抗前置放大器，后接电压比较器。它采用台积电65纳米低功耗CMOS工艺设计，电源电压为1.2V。我们的首款8通道原型已送厂流片，将于2023年8月交付。后仿真结果显示，其单光子时间分辨率（SPTR）抖动的半高全宽（FWHM）低于40 ps，每通道功耗约为3.2 mW。该前端具备3.9 GHz的单位增益带宽，适用于有严格抖动要求和高事件率的应用。其紧凑的外形将便于集成到需要高通道密度的系统中。
英文摘要：
We present LUCAS (Low power Ultra-low jitter Compact ASIC for SiPM), an analog front-end for Silicon Photomultipliers (SiPM) targeting fast timing detectors in Time-of-Flight Computed Tomography (ToF-CT). LUCAS features a very low input impedance preamplifier followed by a voltage comparator. It is designed in TSMC 65 nm low-power CMOS technology with a power supply of 1.2 V. Our first 8-channel prototype has been sent to fabrication and will be received in August 2023. Post-layout simulations predict less than 40 ps FWHM SPTR jitter and an approximate power consumption of 3.2 mW per channel. The front end is suitable for applications with rigorous jitter requirements and high event rates, thanks to its 3.9 GHz unity-gain bandwidth. The front-end compact form factor will facilitate its incorporation into systems demanding high channel densities.
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