软瓦片：紧密耦合并行处理集群的物理实现灵活性
Soft Tiles: Capturing Physical Implementation Flexibility for Tightly-Coupled Parallel Processing Clusters
摘要：
现代高性能计算架构（多核、GPU、众核）基于紧密耦合的处理元件集群，物理上实现为矩形瓦片。它们的尺寸和纵横比对可实现的工作频率和能效有很大影响，但它们应尽可能灵活，以实现顶层芯片布图的高利用率。在本文中，我们探索了用于构建可扩展加速器的具有共享L1内存的RISC-V内核的高性能集群的灵活性范围，目标是建立一种分层实现方法，其中集群可以建模为软瓦片以实现最佳的裸片利用率。
英文摘要：
Modern high-performance computing architectures (Multicore, GPU, Manycore) are based on tightly-coupled clusters of processing elements, physically implemented as rectangular tiles. Their size and aspect ratio strongly impact the achievable operating frequency and energy efficiency, but they should be as flexible as possible to achieve a high utilization for the top-level die floorplan. In this paper, we explore the flexibility range for a high-performance cluster of RISC-V cores with shared L1 memory used to build scalable accelerators, with the goal of establishing a hierarchical implementation methodology where clusters can be modeled as soft tiles to achieve optimal die utilization.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
