arXivDaily arXiv每日学术速递 周一至周五更新
arXiv 2201.02727eess.SPcs.SYeess.SY
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彩虹式快速波束训练多模式空间信号处理器及真时延阵列宽带通信

Multi-Mode Spatial Signal Processor with Rainbow-like Fast Beam Training and Wideband Communications using True-Time-Delay Arrays

Chung-Ching Lin, Chase Puglisi, Veljko Boljanovic, Han Yan, Erfan Ghaderi, Jayce Gaddis, Qiuyan Xu, Sreeni Poolakkal, Danijela Cabric, Subhanshu Gupta

摘要:

毫米波(mmW)无线的初始接入对于成功实现第五代(5G)无线网络及以后至关重要。现有标准中的有限带宽和模拟/混合相控天线阵列(PAA)中移相器的使用不适合这些要求低延迟测向的新兴标准。本文提出了一种基于真时延(TTD)的可重构空间信号处理器(SSP),该处理器采用频分波束训练方法和宽带无波束偏斜的数据通信。采用离散时间延迟补偿时钟技术,通过基于大单位增益带宽环形放大器(RAMP)的信号合路器实现了800~MHz的带宽。为了广泛地表征所提出的SSP在不同的SSP模式和频率-角度对,一个自动化的测试平台开发使用计算机视觉技术,显着加快测试进度,并尽量减少可能的人为错误。TTD SSP对4个天线单元中的每一个使用7级时间交织,在800 MHz上具有3.8 ns的延迟范围,并在波束训练模式下实现独特的频率到角度映射,在波束成形模式下具有接近12 dB的频率无关增益。SSP原型采用65 nm CMOS工艺,面积为1.98 mm $^2$,不包括缓冲器,功耗仅为29 mW。此外,对于16-QAM调制,以122.8Mb/s的速度实现9.8%的误差矢量幅度(EVM)。

英文摘要:

Initial access in millimeter-wave (mmW) wireless is critical toward successful realization of the fifth-generation (5G) wireless networks and beyond. Limited bandwidth in existing standards and use of phase-shifters in analog/hybrid phased-antenna arrays (PAA) are not suited for these emerging standards demanding low-latency direction finding. This work proposes a reconfigurable true-time-delay (TTD) based spatial signal processor (SSP) with frequency-division beam training methodology and wideband beam-squint less data communications. Discrete-time delay compensated clocking technique is used to support 800~MHz bandwidth with a large unity-gain bandwidth ring-amplifier (RAMP)-based signal combiner. To extensively characterize the proposed SSP across different SSP modes and frequency-angle pairs, an automated testbed is developed using computer-vision techniques that significantly speeds up the testing progress and minimize possible human errors. Using seven levels of time-interleaving for each of the 4 antenna elements, the TTD SSP has a delay range of 3.8 ns over 800 MHz and achieves unique frequency-to-angle mapping in the beamtraining mode with nearly 12 dB frequency-independent gain in the beamforming mode. The SSP is prototyped in 65nm CMOS with an area of 1.98mm$^2$ consuming only 29 mW excluding buffers. Further, an error vector magnitude (EVM) of 9.8% is realized for 16-QAM modulation at a speed of 122.8 Mb/s.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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