用于28/60~GHz无线测试床的Xilinx RF-SoC-based数字多波束阵列处理器
Xilinx RF-SoC-based Digital Multi-Beam Array Processors for 28/60~GHz Wireless Testbeds
摘要：
5G蜂窝、大型智能表面（LIS）和全息大规模多输入多输出等新兴无线应用需要使用大量独立数字收发器在毫米波频率下进行天线阵列处理。本文总结了作者在基于宽带可重构FPGA的软件定义无线电（SDR）的28 GHz和60 GHz全数字阵列处理平台的设计和测试方面的最新进展。SDR的数字基带和微波接口方面在Xilinx的单芯片RF片上系统（RF-SoC）处理器上实现。采用ZCU-111和ZCU-1275两种RF SoC技术实现了28 GHz（实现4个平行波束，每个波束带宽0.8 GHz）和60 GHz（实现4个平行波束，每个波束带宽1.8 GHz）的全数字实时阵列处理器。为了进一步提高天线阵增益，提出了采用位于焦平面上的数字相控阵馈源（PAF）馈电的介质微透镜阵列。
英文摘要：
Emerging wireless applications such as 5G cellular, large intelligent surfaces (LIS), and holographic massive MIMO require antenna array processing at mm-wave frequencies with large numbers of independent digital transceivers. This paper summarizes the authors' recent progress on the design and testing of 28 GHz and 60 GHz fully-digital array processing platforms based on wideband reconfigurable FPGA-based software-defined radios (SDRs). The digital baseband and microwave interfacing aspects of the SDRs are implemented on single-chip RF system-on-chip (RF-SoC) processors from Xilinx. Two versions of the RF-SoC technology (ZCU-111 and ZCU-1275) were used to implement fully-digital real-time array processors at 28~GHz (realizing 4 parallel beams with 0.8 GHz bandwidth per beam) and 60~GHz (realizing 4 parallel beams with 1.8~GHz bandwidth per beam). Dielectric lenslet arrays fed by a digital phased-array feed (PAF) located on the focal plane are proposed for further increasing antenna array gain.
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