多值电路和互连问题
Multivalued circuits and Interconnect issues
摘要：
许多论文已经提出了各种技术的多值电路作为解决方案，以减少或解决二进制电路中的互连问题。我们讨论了这个假设。虽然4值信令可以将构建块之间的互连数量除以2，但事实证明，电路设计人员使用基于PCIe、Infiniband、RapidIO、NVLink等差分对的互连标准。并将四值基本门、加法器和乘法器的设计与相应的二值基本门、加法器和乘法器的设计进行了比较。在每个电平上，四进制和二进制电路之间的晶体管计数比大于基极4和基极2之间的x2信息比。四元信号不是一个解决方案，无论是在电路块之间或内部。
英文摘要：
Many papers have presented multi-valued circuits in various technologies as a solution to reduce or solve interconnection issues in binary circuits. This assumption is discussed. While 4-valued signaling could divide by two the number of interconnects between building blocks, it turns out that circuit designers use interconnect standards based on differential pairs such as PCIe, Infiniband, RapidIO, NVLink, etc. Doubling the number of binary signals is a better solution than using single-ended quaternary signals. The design of quaternary basic gates, adders and multipliers are compared with the corresponding binary ones. At each level, the transistor count ratio between quaternary and binary circuits is greater than the x2 information ratio between base 4 and base 2. Quaternary signaling is not a solution, either between or within circuit blocks .
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
