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arXiv 2005.12169quant-phcs.CC
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深度2 QAC电路无法模拟量子奇偶校验

Depth-2 QAC circuits cannot simulate quantum parity

Daniel Padé, Stephen Fenner, Daniel Grier, Thomas Thierauf

摘要:

我们证明了$n > 3$量子比特上的量子奇偶校验门不能用具有两层任意数量的任意C-SIGN门和任意1-量子比特幺正门的量子线路干净地模拟,不管允许的辅助量子比特的数量如何。这是最有名的和第一个非平凡的分离之间的奇偶校验门和电路的这种形式。同样的界限也适用于量子扇出门。我们的结果与Fang等人[3]的结果是不可比较的,后者适用于任何恒定的深度,但需要模拟电路上的辅助量子比特的亚线性数量。

英文摘要:

We show that the quantum parity gate on $n > 3$ qubits cannot be cleanly simulated by a quantum circuit with two layers of arbitrary C-SIGN gates of any arity and arbitrary 1-qubit unitary gates, regardless of the number of allowed ancilla qubits. This is the best known and first nontrivial separation between the parity gate and circuits of this form. The same bounds also apply to the quantum fanout gate. Our results are incomparable with those of Fang et al. [3], which apply to any constant depth but require a sublinear number of ancilla qubits on the simulating circuit.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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