实现每秒兆兆比特通信：$G_N$ -陪集码的硬件实现
Toward Terabits-per-second Communications: A High-Throughput Hardware Implementation of $G_N$-Coset Codes
摘要：
最近提出了一种$G_N$ -陪集码的并行译码算法，该算法利用两个等价的译码图，对每个图，由独立分量码组成的内码部分进行并行译码.获取码位的外部信息，并在图之间迭代交换，直到收敛。由于避免了串行外码处理，该算法比以往的逐次消去算法具有更高的译码并行性。在这项工作中，我们提出了一个硬件实现的并行解码算法，它可以支持最大的$N=16384$。解码器的物理版图采用TSMC $16nm$工艺完成，尺寸为$999.936μm\times 999.936μm, \,\approx 1.00mm^2$。针对$N=16384,K=13225$和$N=16384, K=14161$的情况，对解码器的面积效率和功耗进行了评估。按$7nm$过程缩放，解码器的吞吐量高于具有五次迭代的$477Gbps/mm^2$和$533Gbps/mm^2$。
英文摘要：
Recently, a parallel decoding algorithm of $G_N$-coset codes was proposed.The algorithm exploits two equivalent decoding graphs.For each graph, the inner code part, which consists of independent component codes, is decoded in parallel. The extrinsic information of the code bits is obtained and iteratively exchanged between the graphs until convergence. This algorithm enjoys a higher decoding parallelism than the previous successive cancellation algorithms, due to the avoidance of serial outer code processing. In this work, we present a hardware implementation of the parallel decoding algorithm, it can support maximum $N=16384$. We complete the decoder's physical layout in TSMC $16nm$ process and the size is $999.936μm\times 999.936μm, \,\approx 1.00mm^2$. The decoder's area efficiency and power consumption are evaluated for the cases of $N=16384,K=13225$ and $N=16384, K=14161$. Scaled to $7nm$ process, the decoder's throughput is higher than $477Gbps/mm^2$ and $533Gbps/mm^2$ with five iterations.
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