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arXiv 2001.05463cs.ET
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STT-MRAM测试综述:失效机制、故障模型与测试

Survey on STT-MRAM Testing: Failure Mechanisms, Fault Models, and Tests

Lizhou Wu, Mottaqiallah Taouil, Siddharth Rao, Erik Jan Marinissen, Said Hamdioui

摘要:

作为最有前途的新兴非易失性存储器(NVM)技术之一,自旋转移矩磁性随机存取存储器(STT-MRAM)由于诸如高密度、零待机泄漏和几乎无限的耐久性等若干特征而吸引了显著的研究关注。然而,在STT-MRAM商业化之前需要高质量的测试解决方案。在本文中,我们提出了所有STT-MRAM的故障机制:制造缺陷,极端的工艺变化,磁耦合,STT开关随机性,和热波动。对产生的故障模型进行了分类和讨论,包括永久故障和瞬时故障。此外,有限的测试算法和可测性设计(DfT)的设计在文献中提出的也包括在内。很明显,STT-MRAM的测试解决方案还远远没有建立起来,特别是在考虑十亿分之一缺陷(DPPB)水平要求时。我们提出了三个层次的STT-MRAM测试主题的主要挑战:故障机制,故障建模和测试/DfT设计。

英文摘要:

As one of the most promising emerging non-volatile memory (NVM) technologies, spin-transfer torque magnetic random access memory (STT-MRAM) has attracted significant research attention due to several features such as high density, zero standby leakage, and nearly unlimited endurance. However, a high-quality test solution is required prior to the commercialization of STT-MRAM. In this paper, we present all STT-MRAM failure mechanisms: manufacturing defects, extreme process variations, magnetic coupling, STT-switching stochasticity, and thermal fluctuation. The resultant fault models including permanent faults and transient faults are classified and discussed. Moreover, the limited test algorithms and design-for-testability (DfT) designs proposed in the literature are also covered. It is clear that test solutions for STT-MRAMs are far from well established yet, especially when considering a defective part per billion (DPPB) level requirement. We present the main challenges on the STT-MRAM testing topic at three levels: failure mechanisms, fault modeling, and test/DfT designs.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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