In this work, single-layer intrinsic and fluorinated graphene were investigated as gate insertion layers in normally-OFF p-GaN gate HEMTs, which wraps around the bottom of the gate forming Ti/graphene/p-GaN at the bottom and Ti/graphene/ SiNx on the two sides. Compared to the Au/Ti/p-GaN HEMTs without graphene, the insertion of graphene can increase the ION/IOFF ratios by a factor of 50, increase the VTH by 0.30 V and reduce the off-state gate leakage by 50 times. Additionally, this novel gate structure has better thermal stability. After thermal annealing at 350 °C, gate breakdown voltage holds at 12.1 V, which is first reported for Schottky gate p-GaN HEMTs. This is considered to be a result of the 0.24 eV increase in Schottky barrier height and the better quality of the Ti/graphene/p-GaN and Ti/graphene/SiNx interfaces. This approach is very effective in improving the Ion/Iff ratio and gate BV of normally-OFF GaN HEMTs.
In this work, we studied the gate breakdown mechanisms of p-GaN gate AlGaN/GaN HEMTs by a novel multiple-gate-sweep-based method. For the first time, three different breakdown mechanisms were observed and identified separately in the same devices: the metal/p-GaN junction breakdown, the p-GaN/AlGaN/GaN junction breakdown, and the passivation related breakdown. This method is an effective method to determine the breakdown mechanisms. The different BD mechanisms were further confirmed by scanning electron microscopy (SEM). Finally, the temperature dependences of the three BD mechanisms were meas…
In this letter, we report on a unique device design strategy for increasing the breakdown voltage and hence Baliga Figure of Merit (BFOM) of III-nitride HEMTs by engineering the gate edge towards the drain. The breakdown of such devices with meandering gate-drain access region (M-HEMT) are found to be 62% more compared to that of conventional HEMT while the ON resistance suffers by 76%, leading to an overall improvement in the BFOM for by 28%. 3D-TCAD simulations show that the decrease in the peak electric field at the gate edge was responsible for increased breakdown voltage.
In this work, AlGaN/GaN HEMTs with dual-layer SiNx stressors (composed of a low-stress layer and a high-stress layer) were investigated. The low-stress padding layer solved the surface damage problem caused during the deposition of the high-stress SiNx, and provided a good passivated interface. The HEMTs with dual-layer stressors showed a 1 V increase in the threshold voltage (Vth) with comparable on-current and RF current gain to those without stressors. Moreover, the off-current (I_off) was shown to be reduced by one to three orders of magnitude in the strained devices as a result of the low…
We present a novel p-GaN gate HEMT structure with reduced hole concentration near the Schottky interface by doping engineering in MOCVD, which aims at lowering the electric field across the gate. By employing an additional unintentionally doped GaN layer, the gate leakage current is suppressed and the gate breakdown voltage is boosted from 10.6 to 14.6 V with negligible influence on the threshold voltage and on-resistance. Time-dependent gate breakdown measurements reveal that the maximum gate drive voltage increases from 6.2 to 10.6 V for a 10-year lifetime with a 1% gate failure rate. This m…
Because high electron mobility transistors (HEMTs) often exhibit significant gate leakage during high-temperature operation, the choice of Schottky metal is critical. Increased gate leakage and reduced ON/OFF ratio are unsuitable for the design of high-temperature electronics and integrated circuits. This paper presents high-temperature characteristics of depletion-mode molybdenum trioxide (MoO${_3}$)-gated InAlN/GaN-on-silicon HEMTs in air. After a room temperature oxidation of the Mo for 10 weeks, the leakage of the HEMT is reduced over 60 times compared to the as-deposited Mo. The use of Mo…
Short-term reliability and robustness of 110 nm AlN/GaN HEMTs has been evaluated by means of off-state, semi-on state and on-state step stress tests on devices having different gate-drain distance, LGD. While breakdown voltages and critical voltages scale almost linearly with LGD, failure mode remains almost unchanged in all tested devices, and consists in an increase of gate leakage, accompanied by a positive shift of threshold voltage. In off-state, electroluminescence images detect the presence of localized leakage paths which may act as preferential paths for electron trapping. Degradation…
Scaling of GaN high-electron-mobility transistors (HEMTs) usually increases gate leakage current and deteriorates breakdown characteristic, limiting the maximum drain current and output power density. These bottlenecks can be circumvented by inserting a dielectric material under the gate of HEMTs. Doped HfO2 is an excellent dielectric material but unexplored so far as the gate material of HEMTs for high-speed device application. Here we demonstrate that Zr-doped HfO2 (HZO)-gated InAlN/GaN metal-insulator-semiconductor (MIS) HEMTs exhibit remarkable properties. The device with a gate length (Lg…
The reliability of AlGaN/GaN HEMTs adopting Fe and C co-doping, with high and low carbon doping concentration was investigated by means of different stress tests. Firstly, DC and pulsed I-V characterization at room temperature are discussed, then drain step stress tests at different gate voltages are compared, afterwards, the constant stress at different bias points are discussed. Results show that the high C HEMTs showed reduced DIBL, smaller leakage current, as well as decreased electric field, leading to an improved robustness during on-state stress testing, with respect to the reference on…
We report on the interfacial electronic properties of HfO2 gate dielectrics both, with GaN towards normally-OFF recessed HEMT architectures and the AlGaN barrier for normally-ON AlGaN/GaN MISHEMTs for GaN device platforms on Si. A conduction band offset of 1.9 eV is extracted for HfO2/GaN along with a very low density of fixed bulk and interfacial charges. Conductance measurements on HfO2/GaN MOSCAPs reveal an interface trap state continuum with a density of 9.37x1012 eV-1cm-2 centered at 0.48 eV below EC. The forward and reverse current densities are shown to be governed by Fowler-Nordheim tu…
The cryogenic performance of GaN-based HEMTs (high-electron-mobility transistors) is systematically investigated by the direct current (DC) and low-frequency noise (LFN) characteristics within the temperature (T) range from 300 K to 4.2 K. The important electrical merits of the device, including drain saturation current (IDsat), on-resistance (RON), transductance, subthreshold swing (SS), gate leakage current, and Schottky barrier height, are comprehensively characterized and their temperature-dependent behavior was statistically analyzed. In addition, the LFN of the device shows an evident be…
We report on the demonstration and investigation of Ta2O5 as high-\k{appa} dielectric for InAlN/GaN-MOS HEMT-on-Si. Ta2O5 of thickness 24 nm and dielectric constant ~ 30 was sputter deposited on InAlN/GaN HEMT and was investigated for different post deposition anneal conditions (PDA). The gate leakage was 16nA/mm at -15 V which was ~ 5 orders of magnitude lower compared to reference HEMT. The 2-dimensional electron gas (2DEG) density was found to vary with annealing temperature suggesting the presence of net charge at the Ta2O5/InAlN interface. Dispersion in the capacitance-voltage (C-V) chara…
Breakdown is one of main failure mechanisms that limit write endurance of ferroelectric devices using hafnium oxide-based ferroelectric materials. In this study, we investigate the gate current and breakdown characteristics of Hf0.5Zr0.5O2/Si ferroelectric field-effect transistors (FeFETs) by using carrier separation measurements to analyze electron and hole leakage currents during time-dependent dielectric breakdown (TDDB) tests. Rapidly increasing substrate hole currents and stress-induced leakage current (SILC)-like electron currents can be observed before the breakdown of the ferroelectric…
We report on the demonstration of a deep sub-micron normally-off AlGaN/GaN HEMT with high on-current and high threshold voltage (VTH). The high-performance device was realized by utilizing a gate recess with length and depth of 200 nm and 124 nm respectively. The recess etched region had a roughness of 0.7 nm. Various recess etch depths and dielectric annealing conditions were used to tune the VTH. The optimized device exhibited on-current and VTH of 500 mA/mm and 5 V respectively. The measured breakdown characteristics of the devices and their limitations were investigated using 2D-TCAD devic…
The emerging wide bandgap BAlN alloys have potentials for improved III-nitride power devices including high electron mobility transistor (HEMT). Yet few relevant studies have been carried. In this work, we have investigated the use of the B0.14Al0.86N alloy as part or entirety of the interlayer between the GaN buffer and the AlGaN barrier in the conventional GaN-based high electron mobility transistor (HEMT). The numerical results show considerable improvement of the two-dimensional electron gas (2DEG) concentration with small 2DEG leakage into the ternary layer by replacing the conventional A…
In this letter, we demonstrate a lateral AlGaN/GaN Schottky barrier diode (SBD) on sapphire substrate with low turn-on voltage (Von) and high breakdown voltage (VBK). By using a double barrier anode (DBA) structure formed by the mixture of Platinum (Pt) and Tantalum (Ta), the Von of the SBD can be as low as 0.36 V with a leakage current of 2.5E-6 A/mm. Supported by the high-quality carbon-doped GaN buffer on sapphire, the VBK can reach more than 10 kV with the anode-to-cathode spacing of 85 μm. Combining the VBK and the specific on-resistance (Ron,sp) of 25.1 mΩ.cm^2, the power figure of merit…
In this letter, fin-shape tri-gate $β$-Ga$_{2}$O$_{3}$ lateral MESFETs are demonstrated with a high power figure of merit of 0.95 GW/cm$^{2}$ - a record high for any $β$-Ga$_{2}$O$_{3}$ transistor to date. A low-temperature undoped buffer-channel stack design is developed which demonstrates record high Hall and drift electron mobilities in doped $β$-Ga$_{2}$O$_{3}$ channels allowing for low ON resistances R$_{ON}$ in $β$-Ga$_{2}$O$_{3}$ MESFETs. Fin-widths (W$_{fin}$) were 1.2-1.5 $μ$m and there were 25 fins (N$_{fin}$) per device with a trench depth of $\sim$1$μ$m. A $β$-Ga$_2$O$_3$ MESFET wi…
Field-plated (FP) depletion-mode MOVPE-grown $β$-Ga$_2$O$_3$ lateral MESFETs are realized with superior reverse breakdown voltages and ON currents. A sandwiched SiN$_x$ dielectric field plate design was utilized that prevents etching-related damage in the active region and a deep mesa-etching was used to reduce reverse leakage. The device with L$_{GD}$ = 34.5 $μ$m exhibits an ON current (I$_{DMAX}$) of 56 mA/mm, a high I$_{ON}$/I$_{OFF}$ ratio $>$ 10$^8$ and a very low reverse leakage until catastrophic breakdown at $\sim$ 4.4kV. The highest measurable V$_{BR}$ recorded was 4.57 kV (L$_{GD}$ =…
Degradation of metal-insulator-semiconductor (MIS) capacitors of gold/Parylene-C/Pentacene under constant voltage stress (CVS) was investigated to explore the electrical stability and reliability of Parylene C as a gate dielectric in flexible electronics. A stress voltage of fixed magnitude as high as 20 V, both negative and positive in polarity, was applied to each MIS capacitor at room temperature for a fixed duration as long as 10 s. The CVS effects on the capacitance-voltage curve-shift, the time-dependent leakage current, and the time-dependent dielectric breakdown were measured and analy…
$β$-Ga$_{2}$O$_{3}$ based enhancement mode transistor designs are critical for the realization of low loss, high efficiency next generation power devices with rudimentary driving circuits. A novel approach towards attaining a high positive flat band voltage (V$_{fb}$) of 10.6 V in $β$-Ga$_{2}$O$_{3}$ metal-oxide-semiconductor capacitors (MOSCAPs), with the ability to fine tune it between 3.5 V to 10.6 V, using a polycrystalline AlN charge trap layer has been demonstrated. This can enable enhancement mode operation over a wide doping range. Excellent V$_{fb}$ retention of ${\sim}$97% for 10$^{4…
Vertical $pn$ heterojunction diodes were prepared by plasma-assisted molecular beam epitaxy of unintentionally-doped $p$-type SnO layers with hole concentrations ranging from $p=10^{18}$ to $10^{19}$cm$^{-3}$ on unintentionally-doped $n$-type $β$-Ga$_{2}$O$_{3}$(-201) substrates with an electron concentration of $n=2.0\times10^{17}$cm$^{-3}$. The SnO layers consist of (001)-oriented grains without in-plane expitaxial relation to the substrate. After subsequent contact processing and mesa etching (which drastically reduced the reverse current spreading in the SnO layer and associated high leaka…
Heterostructures prepared from graphene and fluorographene (FG) using the technology of 2D printing on solid and flexible substrates were fabricated and studied. Excellent stability of printed graphene layers and, to a lesser degree, composite graphene: PEDOT: PSS layers were shown. Extraordinary properties of FG as an insulating layer for graphene-based heterostructures at fluorination degree above 30% were demonstrated. It is shown that the leakage current in thin (20-40 nm) films is normally smaller than 10^-8 A/cm2, the breakdown field being greater than 108 V/cm. In hybrid structures with…
