无电阻阴影沉积用于超导量子比特中的约瑟夫森结的硅沟槽
Resist-free shadow deposition using silicon trenches for Josephson junctions in superconducting qubits
AI总结：
本文提出了一种无电阻的约瑟夫森结制备方法，利用蚀刻的硅沟槽，兼容CMOS工艺，提高了超导量子比特的性能和可扩展性。
摘要：
超导量子比特制造的创新持续探索以实现更高性能。尽管基底层制造和加工有所改进，基于电阻的约瑟夫森结（JJ）方案基本未变。沉积过程中的聚合物掩膜导致化学污染，并限制了原位和非原位表面处理、接合材料和可扩展性。在此，我们展示了一种基于蚀刻硅沟槽的无电阻接合制备方法，该方法兼容CMOS且易于集成到现有的量子比特基底层制造和化学处理创新中。我们使用此方法制造了Al-AlOx-Al JJ和量子比特，测量到中位能量弛豫时间最高达184微秒。我们发现衬底-金属界面处的污染极小，能量弛豫在35小时时间尺度上出现波动，这些波动窄且正常分布。该方法扩大了衬底准备的过程窗口和新材料平台的可能性。
英文摘要：
Superconducting qubit fabrication innovations continue to be explored to achieve higher performance. Despite improvements to base layer fabrication and processing, resist-based Josephson junction (JJ) schemes have largely remained unchanged. The polymer mask during deposition causes chemical contamination and limits in situ and ex situ surface preparation, junction materials, and scalability. Here, we demonstrate a resist-free approach to junction fabrication based on etched silicon trenches that is CMOS compatible and easily integrated into existing innovations in qubit base layer fabrication and chemical processing. We fabricate Al-AlOx-Al JJs and qubits using this method, measuring median energy relaxation times up to 184 microseconds. We find minimal contamination at the substrate-metal interface and fluctuations of energy relaxation on a 35 hour timescale that are narrow and normally distributed. The method widens the process window for substrate preparation and new materials platforms.
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