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arXiv 2604.04523cs.AR
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LOCALUT: 利用容量-计算权衡实现基于LUT的DRAM-PIM推理

LOCALUT: Harnessing Capacity-Computation Tradeoffs for LUT-Based Inference in DRAM-PIM

Seoul National University(首尔大学);Yonsei University(延世大学)

Junguk Hong, Changmin Shin, Sukjin Kim, Si Ung Noh, Taehee Kwon, Seongyeon Park, Hanjun Kim, Youngsok Kim, Jinho Lee

AI总结:

本文提出LOCALUT,通过将多个MAC操作打包到单个LUT查找中,利用容量-计算权衡提升DRAM-PIM中低比特量化DNN推理效率,实现1.82倍的几何平均加速。

摘要:

查找表(LUTs)作为一种替代计算机制,能够将输入操作数映射到预计算结果,从而避免使用算术逻辑。LUTs不仅减少了逻辑复杂度,还自然支持多种数值精度,而无需为每个位宽单独设计电路,这在量化DNN中日益重要。这在PIM中创造了有利的权衡:内存容量可以替代逻辑以增加计算吞吐量,与提供高带宽和易得内存但逻辑密度有限的DRAM-PIM架构相吻合。本文探讨了基于LUT的PIM设计中的容量-计算权衡,通过将多个MAC操作打包到单个LUT查找中来换取性能。基于这一见解,我们提出LOCALUT,一种基于PIM的高效低比特量化DNN推理设计,利用操作打包LUTs。首先,我们发现这些LUTs包含大量冗余,并引入LUT规范化,通过消除重复条目来减小LUT大小。其次,我们提出重排LUT,一种轻量级辅助LUT,通过简单的LUT查找将权重向量映射到LUT规范化所需的规范形式。第三,我们提出LUT切片流式传输,一种新的执行策略,利用DRAM缓冲器层次结构,仅将相关LUT列流式传输到缓冲器中,并在多个权重向量之间重用。在基于UPMEM设备的真实系统上评估,我们展示了在各种数值精度和DNN模型中达到1.82倍的几何平均加速。我们相信LOCALUT为面向LUT基于DNN推理的可扩展、低逻辑PIM设计开辟了新路径。我们的LOCALUT实现可在https://github.com/AIS-SNU/LoCaLUT上找到。

英文摘要:

Lookup tables (LUTs) have recently gained attention as an alternative compute mechanism that maps input operands to precomputed results, eliminating the need for arithmetic logic. LUTs not only reduce logic complexity, but also naturally support diverse numerical precisions without requiring separate circuits for each bitwidth-an increasingly important feature in quantized DNNs. This creates a favorable tradeoff in PIM: memory capacity can be used in place of logic to increase computational throughput, aligning well with DRAM-PIM architectures that offer high bandwidth and easily available memory but limited logic density. In this work, we explore this capacity-computation tradeoff in LUT-based PIM designs, where memory capacity is traded for performance by packing multiple MAC operations into a single LUT lookup. Building on this insight, we propose LOCALUT, a PIM-based design for efficient low-bit quantized DNN inference using operation-packed LUTs. First, we observe that these LUTs contain extensive redundancy and introduce LUT canonicalization, which eliminates duplicate entries to reduce LUT size. Second, we propose reordering LUT, a lightweight auxiliary LUT that remaps weight vectors to their canonical form required by LUT canonicalization with a simple LUT lookup. Third, we propose LUT slice streaming, a novel execution strategy that exploits the DRAM-buffer hierarchy by streaming only relevant LUT columns into the buffer and reusing them across multiple weight vectors. Evaluated on a real system based on UPMEM devices, we demonstrate a geometric mean speedup of 1.82x across various numeric precisions and DNN models. We believe LOCALUT opens a path toward scalable, low-logic PIM designs tailored for LUT-based DNN inference. Our implementation of LOCALUT is available at https://github.com/AIS-SNU/LoCaLUT.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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