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arXiv 2602.18568cs.ARcs.AI
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RPU -- 一种推理处理单元

RPU -- A Reasoning Processing Unit

Matthew Adiletta, Gu-Yeon Wei, David Brooks

AI总结:

RPU通过优化内存带宽和架构设计,显著提升了大型语言模型推理的性能和效率。

摘要:

大型语言模型(LLM)的推理性能日益受到内存墙的限制。尽管GPU持续提升原始计算吞吐量,但它们在内存带宽受限的工作负载中难以实现可扩展的性能。这一挑战在新兴的推理LLM应用中被进一步放大,其中长输出序列、低算术强度和严格的延迟约束要求显著更高的内存带宽。因此,系统利用率下降,每推理能耗上升,凸显了需要一种优化的系统架构来实现可扩展的内存带宽。为了解决这些挑战,我们提出了推理处理单元(RPU),一种基于芯片片的架构,旨在解决现代内存墙的问题。RPU引入了三种关键要素:(1)一种容量优化的高带宽内存(HBM-CO),通过牺牲容量来换取更低的能量和成本;(2)一种可扩展的芯片片架构,采用以带宽优先的功率和面积配置设计;(3)一种解耦的微架构,将内存、计算和通信流水线分离以维持高带宽利用率。模拟结果显示,在ISO-TDP条件下,RPU在Llama3-405B上相比H100系统,延迟降低达45.3倍,吞吐量提高达18.6倍。

英文摘要:

Large language model (LLM) inference performance is increasingly bottlenecked by the memory wall. While GPUs continue to scale raw compute throughput, they struggle to deliver scalable performance for memory bandwidth bound workloads. This challenge is amplified by emerging reasoning LLM applications, where long output sequences, low arithmetic intensity, and tight latency constraints demand significantly higher memory bandwidth. As a result, system utilization drops and energy per inference rises, highlighting the need for an optimized system architecture for scalable memory bandwidth. To address these challenges we present the Reasoning Processing Unit (RPU), a chiplet-based architecture designed to address the challenges of the modern memory wall. RPU introduces: (1) A Capacity-Optimized High-Bandwidth Memory (HBM-CO) that trades capacity for lower energy and cost; (2) a scalable chiplet architecture featuring a bandwidth-first power and area provisioning design; and (3) a decoupled microarchitecture that separates memory, compute, and communication pipelines to sustain high bandwidth utilization. Simulation results show that RPU performs up to 45.3x lower latency and 18.6x higher throughput over an H100 system at ISO-TDP on Llama3-405B.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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