利用沟槽抑制超导电子中的磁通量陷阱
Mitigation of Magnetic Flux Trapping in Superconducting Electronics Using Moats
AI总结：
本研究系统地探讨了在超导铌薄膜中使用沟槽阵列抑制磁通量陷阱的有效性，通过测量涡流排斥场估算不同几何形状下的磁通饱和数和磁通陷阱温度，发现高宽比的矩形'槽'状沟槽在最小面积成本下提供最强的抑制效果，但沟槽单独使用无法完全消除非理想薄膜中的磁通量陷阱。
摘要：
磁通量（涡流）陷阱仍然是超导电子非常大规模集成的主要障碍。沟槽——在电路层中刻蚀的区域，放置在地平面和关键电路周围——提供了一种简单的被动方法来隔离磁通量。在这里，我们系统地考察了在超导铌薄膜中沟槽阵列的有效性，作为几何参数（尺寸、形状和密度）和背景磁场函数。通过测量涡流排斥场，我们估计了不同几何形状下的磁通饱和数和磁通陷阱温度。我们发现许多沟槽设计在磁屏蔽环境中（<1 μT）能够有效隔离磁通量，高宽比的矩形“槽”状沟槽在最小面积成本下提供最强的抑制效果。然而，我们的测量显示，沟槽单独使用无法在非理想薄膜中消除磁通量陷阱，因为涡流可以优先在材料缺陷处被固定。这些结果为超导集成电路中的磁通量抑制提供了设计指导，并突显了电路几何形状和材料的综合优化的必要性。
英文摘要：
Magnetic flux (vortex) trapping remains a major obstacle to very large scale integration in superconducting electronics. Moats -- etched regions in circuit layers placed in ground planes and around critical circuitry -- offer a simple passive approach to sequester flux. Here, we systematically examine the effectiveness of moat arrays in superconducting niobium films as a function of geometry (size, shape, and density) and background magnetic field. By measuring the vortex expulsion field, we estimate the flux saturation number and flux trapping temperature for a range of geometries. We find that many moat designs effectively sequester flux in magnetically shielded environments (< 1 $μ$T), with high-aspect-ratio rectangular "slit" moats providing the strongest mitigation at minimal area cost. However, our measurements show that moats alone do not eliminate flux trapping in non-ideal films, as vortices can preferentially pin at material defects. These results provide design guidance for flux mitigation in superconducting integrated circuits and highlight the need for combined optimization of circuit geometries and materials.
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